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AT42QT1070 [DATASHEET]
9596C–AT42–05/2013
5.10 Address 46 – 52: Detection Integrator (DI)
DETECTION INTEGRATOR: addresses 46 – 52 allow the DI level to be set for each key. This 8-bit value controls
the number of consecutive measurements that must be confirmed as having passed the key threshold before that
key is registered as being in detect. The minimum value for the DI filter is 2. Settings of 0 and 1 for the DI also default
to 2 because a minimum of two consecutive measurements must be confirmed.
Default: 4
5.11 Address 53: FastOutDI/Max Cal/Guard Channel
FO: Fast Out DI – when bit 5 is set then a key filters out with an integrator of 4. Could have a DI in of 100 but filter out
with DI of 4 (global setting for all keys).
MAX CAL: if this bit is clear then all keys recalibrate after a Max On Duration timeout, otherwise only the key with the
incorrect timing gets recalibrated.
GUARD CHANNEL: bits 0 – 3 are used to set a key as the guard channel (which gets priority filtering). Valid values
are 0 – 6, with any larger value disabling the guard key feature.
5.12 Address 54: Low Power (LP) Mode
Table 5-10. Detection Integrator
Address b7 b6 b5 b4 b3 b2 b1 b0
46–52 DETECTION INTEGRATOR
Table 5-11. Max Cal/Guard Channel
Address b7 b6 b5 b4 b3 b2 b1 b0
53 – FO MAX CAL GUARD CHANNEL
Table 5-12. LP Mode
Address b7 b6 b5 b4 b3 b2 b1 b0
54 LOW POWER MODE
