LTM4608
17
4608fd
Slope Compensation
The module has already been internally compensated for
all output voltages. Table 3 is provided for most application
requirements. A spice model will be provided for other
control loop optimization. For single module operation,
connect I
THM
pin to SGND. For parallel operation, tie I
THM
pins together and then connect to SGND at one point. Tie
I
TH
pins together to share currents evenly for all phases.
Output Margining
For a convenient system stress test on the LTM4608’s
output, the user can program the LTM4608’s output to
±5%, ±10% or ±15% of its normal operational voltage.
The margin pin with a voltage divider is driven with a
small three-state gate as shown in Figure 18, for the three
margin states (high, low, no margin). When the MGN
pin is <0.3V, it forces negative margining in which the
output voltage is below the regulation point. When MGN is
>V
IN
– 0.3V, the output voltage is forced above the regu-
lation point. The amount of output voltage margining is
applicaTions inForMaTion
determined by the BSEL pin. When BSEL is low, it is 5%.
When BSEL is high, it is 10%. When BSEL is floating,
it is 15%. When margining is active, the internal output
overvoltage and undervoltage comparators are disabled
and PGOOD remains high. Margining is disabled by tying
the MGN pin to a voltage divider as shown in Figure 20.
Thermal Considerations and Output Current Derating
The power loss curves in Figures 7 and 8 can be used
in coordination with the load current derating curves in
Figures 9 to 16 for calculating an approximate θ
JA
for the
module with various heat sinking methods. Thermal models
are derived from several temperature measurements at
the bench, and thermal modeling analysis. Thermal Ap-
plication Note 103 provides a detailed explanation of the
analysis for the thermal models and the derating curves.
Tables 4 and 5 provide a summary of the equivalent θ
JA
for the noted conditions. These equivalent θ
JA
parameters
are correlated to the measured values and improve with
air flow. The junction temperature is maintained at 125°C
or below for the derating curves.
Figure 7. 3.3V
IN
, 2.5V and 1.5V
OUT
Power Loss Figure 8. 5V
IN
, 3.3V and 1.5V
OUT
Power Loss
LOAD CURRENT (A)
0
POWER LOSS (W)
2.0
2.5
3.0
8
4608 F07
1.5
1.0
0
2
4
6
0.5
4.0
3.5
3.3V
IN
1.5V
OUT
3.3V
IN
2.5V
OUT
LOAD CURRENT (A)
0
POWER LOSS (W)
2.0
2.5
3.0
8
4608 F08
1.5
1.0
0
2
4
6
0.5
4.0
3.5
5V
IN
1.5V
OUT
5V
IN
3.3V
OUT
