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L9362
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P17
7/17
L9362
1.0
Diagnostic Register and SPI tim
ing
Figure 1. Impulse diagram to read
the Diagnostic Register
Note: FR_RES
ET means Reset
failure stor
age (inter
nal signal)
Figure 2. Diagnostic Failure Register Structure
FR_RESET
SDI
LSB
D1
D2
D3
D4
D5
99AT0008
D6
MSB
D2
SDO
CLK
NCS
LSB
FSL
D1
D6
D4
D3
D5
MSB
99AT0009/A
D5
D7
D6
D1
D3
D4
D2
D0
FSL
MSB
LSB
Failure indicator bit
(only valid during NCS = LOW
to the first L to H CLK change
1: failure stored
0: no failures
Status channel 4
D0
D1
Status
1
1
no failures
1
0
open circuit, channel on
0
1
short to battery or overtemperature
0
0
short to gnd, channel off
Status channel 3
D2 D3 corresponding to D0 D1
Status channel 2
D4 D5 corresponding to D0 D1
Status channel 1
D6 D7 corresponding to D0 D1
L9362
8/17
Figure 3. Tim
ing of the Seri
al Interface
Figure 4. Short-Circuit to GN
D Failure (SCG-Failure) Det
ection
SDI
t
scld
t
hcld
D0
D1
D7
99AT0010
t
hclch
t
sclch
t
csdv
SDO
CLK
NCS
t
pcld
FSL
t
clh
t
hclcl
D0
t
cll
D7
t
pchdz
t
sclcl
00AT0002
t_SCG (filter-time)
Failure-detection
V
drain
V
drain
< V
ref
at OFF-state
Failure-store
Filter-time
V
ref
NON
OFF
ON
Failure-detection time
for a SCG-failure
SCG-failure
9/17
L9362
Figure 5. Open-Load Fail
ure (OL-Failure) Detection
00AT0003
NON
OFF
ON
Failure detection active
for a sporadical OL-failure
Lload
I_OL
Lload > I_OL
Diagnostic active
t_OL (filter-time)
Failure-detection
Failure-store
Sporadical failure-detection
Statical failure-detection
t_OL
Retrigger
t filter
Retrigger
filter
Lload > I_OL
for t > t_OL
Sporadical
failure-detection
t < t_OL
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P17
L9362
Mfr. #:
Buy L9362
Manufacturer:
STMicroelectronics
Description:
Gate Drivers Quad Low Side
Lifecycle:
New from this manufacturer.
Delivery:
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