MAX5038/MAX5041
Dual-Phase, Parallelable, Average Current-Mode
Controllers
22 ______________________________________________________________________________________
Selecting higher switching frequencies reduces the
inductance requirement, but at the cost of lower efficien-
cy. The charge/discharge cycle of the gate and drain
capacitances in the switching MOSFETs create switching
losses. The situation worsens at higher input voltages,
since switching losses are proportional to the square of
input voltage. Use 500kHz per phase for V
IN
= +5V and
250kHz or less per phase for V
IN
> +12V.
Although lower switching frequencies per phase increase
the peak-to-peak inductor ripple current (∆I
L
), the ripple
cancellation in the multiphase topology reduces the input
and output capacitor RMS ripple current.
Use the following equation to determine the minimum
inductance value:
Choose ∆I
L
equal to about 40% of the output current
per phase. Since ∆I
L
affects the output-ripple voltage,
the inductance value may need minor adjustment after
choosing the output capacitors for full-rated efficiency.
Choose inductors from the standard high-current,
surface-mount inductor series available from various
manufacturers. Particular applications may require cus-
tom-made inductors. Use high-frequency core material
for custom inductors. High ∆I
L
causes large peak-to-peak
flux excursion increasing the core losses at higher fre-
quencies. The high-frequency operation coupled with
high ∆I
L
, reduces the required minimum inductance
and even makes the use of planar inductors possible.
The advantages of using planar magnetics include low-
profile design, excellent current-sharing between phas-
es due to the tight control of parasitics, and low cost.
For example, calculate the minimum inductance at
V
IN(MAX)
= +13.2V, V
OUT
= +1.8V, ∆I
L
= 10A, and f
SW
=
250kHz:
The average current-mode control feature of the
MAX5038/MAX5041 limits the maximum peak inductor
current which prevents the inductor from saturating.
Choose an inductor with a saturating current greater
than the worst-case peak inductor current.
Use the following equation to determine the worst-case
inductor current for each phase:
where R
SENSE
is the sense resistor in each phase.
Switching MOSFETs
when choosing a MOSFET for voltage regulators,
consider the total gate charge, R
DS(ON)
, power dissipa-
tion, and package thermal impedance. The product of
the MOSFET gate charge and on-resistance is a figure of
merit, with a lower number signifying better performance.
Choose MOSFETs optimized for high-frequency switch-
ing applications.
The average gate-drive current from the MAX5038/
MAX5041 output is proportional to the total capacitance
it drives from DH1, DH2, DL1, and DL2. The power dis-
sipated in the MAX5038/MAX5041 is proportional to the
input voltage and the average drive current. See the V
IN
and V
CC
section to determine the maximum total gate
charge allowed from all the driver outputs together.
The gate charge and drain capacitance (CV
2)
loss, the
cross-conduction loss in the upper MOSFET due to finite
rise/fall time, and the I
2
R loss due to RMS current in the
MOSFET R
DS(ON)
account for the total losses in the MOS-
FET. Estimate the power loss (PD
MOS
_) in the high-side
and low-side MOSFETs using following equations:
where Q
G
, R
DS(ON)
, t
R
, and t
F
are the upper-switching
MOSFET’s total gate charge, on-resistance at +25°C,
rise time, and fall time, respectively.
where D = V
OUT
/V
IN
, I
DC
= (I
OUT
- ∆I
L
)/2 and I
PK
=
(I
OUT
+ ∆I
L
)/2
