NCP81071BMNTXG Datasheet NCP81071AMNTXG, NCP81071CMNTXG, NCP81071BMNTXG | P1-P3

April, 2016 − Rev. 3

1 Publication Order Number:

NCP81071/D

NCP81071

Dual 5 A High Speed

Low-Side MOSFET Drivers

with Enable

NCP81071 is a high speed dual low−side MOSFETs driver. It is

capable of providing large peak currents into capacitive loads. This

driver can deliver 5 A peak current at the Miller plateau region to help

reduce the Miller effect during MOSFETs switching transition. This

driver also provides enable functions to give users better control

capability in different applications. ENA and ENB are implemented

on pin 1 and pin 8 which were previously unused in the industry

standard pin−out. They are internally pulled up to driver’s input

voltage for active high logic and can be left open for standard

operations. This part is available in MSOP8−EP package, SOIC8

package and WDFN8 3 mm x 3 mm package.

Features

• High Current Drive Capability ±5 A

• TTL/CMOS Compatible Inputs Independent of Supply Voltage

• Industry Standard Pin−out

• High Reverse Current Capability (6 A) Peak

• Enable Functions for Each Driver

• 8 ns Typical Rise and 8 ns Typical Fall Times with 1.8 nF Load

• Typical Propagation Delay Times of 20 ns with Input Falling and

20ns with Input Rising

• Input Voltage from 4.5 V to 20 V

• Dual Outputs can be Paralleled for Higher Drive Current

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Applications

• Server Power

• Telecommunication, Datacenter Power

• Synchronous Rectifier

• Switch Mode Power Supply

• DC/DC Converter

• Power Factor Correction

• Motor Drive

• Renewable Energy, Solar Inverter

See detailed ordering and shipping information in the packag

dimensions section on page 11 of this data sheet.

ORDERING INFORMATION

MARKING

DIAGRAMS

www.onsemi.com

SOIC−8

D SUFFIX

CASE 751

XXXX

ALYW

PIN CONNECTIONS

INA

ENA

(Top View)

XX = Specific Device Code

A = Assembly Location

L = Wafer Lot

Y = Year

W = Work Week

M = Date Code

G = Pb−Free Package

(Note: Microdot may be in either location)

OUTB

VDD

OUTA

ENB

INB

GND

MSOP−8

Z SUFFIX

CASE 846AM

WDFN8

MN SUFFIX

CASE 511CD

XXXX

AYW

XX MG

NCP81071

www.onsemi.com

VDD

Ref

Logic

A Channel

Logic

B Channel

UVLO

VDD

INA

ENA

GND

INB

ENB

OUTA

OUTB

VDD

Figure 1. NCP81071 Block Diagram

NCP81071A NCP81071B

NCP81071C

VDD

Ref

Logic

A Channel

Logic

B Channel

UVLO

VDD

INA

ENA

GND

INB

ENB

OUTA

OUTB

VDD

Ref

Logic

A Channel

Logic

B Channel

UVLO

VDD

INA

ENA

GND

INB

ENB

OUTA

OUTB

VDD

Table 1. PIN DESCRIPTION

Pin No. Symbol Description

1 ENA Enable input for the driver channel A with logic compatible threshold and hysteresis. This pin is used to en-

able and disable the driver output. It is internally pulled up to VDD with a 200 kW resistor for active high op-

eration. The output of the pin when the device is disabled will be always low.

2 INA Input of driver channel A which has logic compatible threshold and hysteresis. If not used, this pin should be

connected to either VDD or GND. It should not be left unconnected.

3 GND Common ground. This ground should be connected very closely to the source of the power MOSFET.

4 INB Input of driver channel B which has logic compatible threshold and hysteresis. If not used, this pin should be

connected to either VDD or GND. It should not be left unconnected.

5 OUTB Output of driver channel B. The driver is able to provide 5 A drive current to the gate of the power MOSFET.

6 VDD Supply voltage. Use this pin to connect the input power for the driver device.

7 OUTA Output of driver channel A. The driver is able to provide 5 A drive current to the gate of the power MOSFET.

8 ENB Enable input for the driver channel B with logic compatible threshold and hysteresis. This pin is used to en-

able and disable the driver output. It is internally pulled up to VDD with a 200 kW resistor for active high op-

eration. The output of the pin when the device is disabled will be always low.

NCP81071

www.onsemi.com

TYPICAL APPLICATION CIRCUIT

INA

ENA

GND

INB

ENB

OUTA

OUTB

VDD

NCP81071

Table 2. ABSOLUTE MAXIMUM RATINGS

Value

Unit

Min Max

Supply Voltage VDD −0.3 24 V

Output Current (DC) Iout_dc 0.3 A

Reverse Current (Pulse< 1 ms)

6.0 A

Output Current (Pulse < 0.5 ms)

Iout_pulse 6.0 A

Input Voltage INA, INB −6.0 VDD+0.3

Enable Voltage ENA, ENB −0.3 VDD+0.3

Output Voltage OUTA, OUTB −0.3 VDD+0.3 V

Output Voltage (Pulse < 0.5 ms)

OUTA, OUTB −3.0 VDD+3.0 V

Junction Operation Temperature T

−40 150

°C

Storage Temperature T

stg

−65 160

Electrostatic Discharge

Human body model, HBM 4000

Charge device model, CDM 1000

OUTA OUTB Latch−up Protection 500 mA

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

Table 3. RECOMMENDED OPERATING CONDITIONS

Parameter Rating Unit

VDD supply Voltage 4.5 to 20 V

INA, INB input voltage −5.0 to VDD V

ENA, ENB input voltage 0 to VDD V

Junction Temperature Range −40 to +140 °C

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may affect device reliability.

Table 4. THERMAL INFORMATION

Package

(5C/W) q

(5C/W)

SOIC−8 115 50

MSOP−8 EP 39 4.7

WDFN8 3x3 39 4.7

P1-P3 P4-P6 P7-P9 P10-P12 P13-P14

NCP81071BMNTXG

Mfr. #:

Buy NCP81071BMNTXG

Manufacturer:

ON Semiconductor

Description:

Gate Drivers DUAL LOW-SIDE DRIVER

Lifecycle:

New from this manufacturer.

Delivery:

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NCP81071BMNTXG

NCP81071BMNTXG

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