10
Addressing
Each slave device on the serial bus needs to have a unique
address. This is the rst byte that is sent by the master-
transmitter after the START condition. The address is
dened as the rst seven bits of the rst byte.
The eighth bit or least signicant bit (LSB) determines
the direction of data transfer. A ‘one’ in the LSB of the rst
byte indicates that the master will read data from the
addressed slave (master-receiver and slave-transmitter).
A ‘zero’ in this position indicates that the master will
write data to the addressed slave (master-transmitter
and slave-receiver).
A device whose address matches the address sent by
the master will respond with an acknowledge for the
rst byte and set itself up as a slave-transmitter or slave-
receiver depending on the LSB of the rst byte.
The slave address on ADJD-S371-QR999 is 0x74 (7-bits).
Data Format
ADJD-S371-QR999 uses a register-based programming
architecture. Each register has a unique address and
controls a specic function inside the chip.
To write to a register, the master rst generates a START
condition. Then it sends the slave address for the device
it wants to communicate with. The least signicant bit
(LSB) of the slave address must indicate that the master
wants to write to the slave. The addressed device will
then acknowledge the master.
The master writes the register address it wants to access
and waits for the slave to acknowledge. The master
then writes the new register data. Once the slave
acknowledges, the master generates a STOP condition
to end the data transfer.
Figure 9. Slave addressing
Figure 10. Register byte write protocol
A6 A5 A4 A3 A2 A1 A0
1 1 1 0 1 0 0
R/W
SLAVE ADDRESS
MSB LSB
S A6 A5 A4 A3 A2 A1 A0 W A D7 D6 D5 D4 D3 D2 D1 D0 A D7 D6 D5 D4 D3 D2 D1 D0 A P
START CONDITION MASTER WILL WRITE DATA STOP CONDITION
MASTER SENDS
SLAVE ADDRESS
MASTER WRITES
REGISTER ADDRESS
MASTER WRITES
REGISTER DATA
SLAVE ACKNOWLEDGE SLAVE ACKNOWLEDGE SLAVE ACKNOWLEDGE
