74LVT_LVTH16374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 2 April 2012 9 of 19
NXP Semiconductors
74LVT16374A; 74LVTH16374A
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
[1] All typical values are at V
CC
= 3.3 V and T
amb
= 25 C.
[2] t
su
is the same as t
su(H)
and t
su(L)
.
[3] t
h
is the same as t
h(H)
and t
h(L)
.
[4] t
W
is the same as t
W(H)
and t
W(L)
.
11. Waveforms
t
su
set-up time nDn to nCP; HIGH or LOW; see Figure 9
[2]
V
CC
= 3.3 V 0.3 V 2.0 0.7 - ns
V
CC
= 2.7 V 2.0 - - ns
t
h
hold time nDn to nCP; HIGH or LOW; see Figure 9
[3]
V
CC
= 3.3 V 0.3 V 0.8 0 - ns
V
CC
= 2.7 V 0.1 - - ns
t
W
pulse width nCP HIGH; see Figure 7
[4]
V
CC
= 3.3 V 0.3 V 1.5 0.6 - ns
V
CC
= 2.7 V 1.5 - - ns
nCP LOW; see Figure 7
V
CC
= 3.3 V 0.3 V 3.0 1.6 - ns
V
CC
= 2.7 V 3.0 - - ns
Table 7. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10.
Symbol Parameter Conditions Min Typ
[1]
Max Unit
Measurement points are given in Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 7. Propagation delay clock input to output, clock pulse width and maximum clock frequency
001aaa256
nCP input
nQn
output
t
PHL
t
PLH
t
W
V
OH
V
I
GND
V
OL
V
M
V
M
V
M
1/f
max
Table 8. Measurement points
Input Output
V
M
V
M
V
X
V
Y
1.5 V 1.5 V V
OL
+ 0.3 V V
OH
0.3 V
