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74LVT16374AEVK

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
74LVT_LVTH16374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 2 April 2012 12 of 19
NXP Semiconductors
74LVT16374A; 74LVTH16374A
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
12. Package outline
Fig 11. Package outline SOT370-1 (SSOP48)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.4
0.2
2.35
2.20
0.25
0.3
0.2
0.22
0.13
16.00
15.75
7.6
7.4
0.635 1.4 0.25
10.4
10.1
1.0
0.6
1.2
1.0
0.85
0.40
8
0
o
o
0.18 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT370-1
99-12-27
03-02-19
(1)
w M
b
p
D
H
E
E
Z
e
c
v M
A
X
A
y
48
25
MO-118
24
1
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
pin 1 index
0 5 10 mm
scale
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
A
max.
2.8
74LVT_LVTH16374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 2 April 2012 13 of 19
NXP Semiconductors
74LVT16374A; 74LVTH16374A
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Fig 12. Package outline SOT362-1 (TSSOP48)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(2)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.15
0.05
0.2
0.1
8
0
o
o
0.1
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
SOT362-1
99-12-27
03-02-19
w M
θ
A
A
1
A
2
D
L
p
Q
detail X
E
Z
e
c
L
X
(A )
3
0.25
124
48 25
y
pin 1 index
b
H
1.05
0.85
0.28
0.17
0.2
0.1
12.6
12.4
6.2
6.0
0.5 1 0.25
8.3
7.9
0.50
0.35
0.8
0.4
0.08
0.8
0.4
p
E
v M
A
A
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
SOT362-1
A
max.
1.2
0
2.5
5 mm
scale
MO-153
74LVT_LVTH16374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 2 April 2012 14 of 19
NXP Semiconductors
74LVT16374A; 74LVTH16374A
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Fig 13. Package outline SOT702-1 (VFBGA56)
0.65
A
1
bA
2
UNIT D
ye
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
02-08-08
03-07-01
IEC JEDEC JEITA
mm
1
0.3
0.2
0.7
0.6
4.6
4.4
y
1
7.1
6.9
0.45
0.35
0.08 0.1
e
1
3.25
e
2
5.85
DIMENSIONS (mm are the original dimensions)
SOT702-1 MO-225
E
0.15
v
0.08
w
0 2.5 5 mm
scale
SOT702-1
VFBGA56: plastic very thin fine-pitch ball grid array package; 56 balls; body 4.5 x 7 x 0.65 mm
A
max.
A
A
2
A
1
detail X
y
y
1
C
e
e
b
X
D
E
C
A
B
C
D
E
F
H
G
J
K
246135
ball A1
index area
B
A
e
2
e
1
1/2 e
1/2 e
AC
C
B
∅ v
M
∅ w
M
ball A1
index area
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

74LVT16374AEVK

Mfr. #:
Buy 74LVT16374AEVK
Manufacturer:
Nexperia
Description:
Flip Flops 74LVT16374AEV/VFBGA56/STANDARD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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