4
LTC1148
LTC1148-3.3/LTC1148-5
114835fd
E
LECTR
IC
AL C CHARA TERIST
ICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formulas:
LTC1148CN, LTC1148CN-3.3, LTC1148CN-5: T
J
= T
A
+ (P
D
× 70°C/W)
LTC1148CS, LTC1148CS-3.3, LTC1148CS-5: T
J
= T
A
+ (P
D
× 110°C/W)
Note 3: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 4: The LTC1148 and LTC1148HV versions are tested with external
feedback resistors resulting in a nominal output voltage of 5V. The
LTC1148L version is tested with external feedback resistors resulting in a
nominal output voltage of 2.5V.
Note 5: In applications where R
SENSE
is placed at ground potential, the off
time increases approximately 40%.
Note 6: The LTC1148, LTC1148HV and LTC1148L series are not tested
and not quality assurance sampled at –40°C and 85°C. These
specifications are guaranteed by design and/or correlation. The
LTC1148HVI-5 is guaranteed over the full –40°C to 85°C operating
temperature range.
Note 7: The LTC1148L and LTC1148L-3.3 allow operation to V
IN
= 3.5V.
CCHARA TERIST
ICS
UW
AT
Y
P
I
CA
LPER
F
O
R
C
E
Line RegulationEfficiency vs Input Voltage
LOAD CURRENT (A)
0
100
V
OUT
(mV)
–80
–60
–40
–20
0
20
0.5 1 1.5 2
LTC1148 • TPC03
2.5
FIGURE 1 CIRCUIT
R
SENSE
= 0.05
V
IN
= 6V
V
IN
= 12V
INPUT VOLTAGE (V)
0
80
EFFICIENCY (%)
82
86
88
90
100
94
4
8
LTC1148 • TPC01
84
96
98
92
12
16
20
I
LOAD
= 100mA
FIGURE 1 CIRCUIT
I
LOAD
= 1A
DC Supply Current
Supply Current in Shutdown
Load Regulation
Operating Frequency
vs (V
IN
– V
OUT
)
(V
IN
– V
OUT
) VOLTAGE (V)
0
NORMALIZED FREQUENCY
0.6
1.0
8
LTC1148 • TPC06
0.4
0
2
4
6
0.2
1.2
0.8
10 12
1.4
1.6
V
OUT
= 5V
0°C
70°C
25°C
INPUT VOLTAGE
0
0
SUPPLY CURRENT (mA)
0.3
0.9
1.2
1.5
4
LTC1148 • TPC04
0.6
26
1.8
2.1
8 10 12 14 16 18
SLEEP MODE
ACTIVE MODE
NOT INCLUDING
GATE CHARGE CURRENT
20
INPUT VOLTAGE (V)
0
0
SUPPLY CURRENT (µA)
2
6
8
10
20
14
4
8
10 18
LTC1148 • TPC05
4
16
18
12
26
12
14
16
V
SHUTDOWN
= 2V
20
INPUT VOLTAGE (V)
0
V
OUT
(mV)
0
10
20
16
LTC1148 • TPC02
–10
–20
–40
4
812
–30
40
30
FIGURE 1 CIRCUIT
I
LOAD
= 1A
20
5
LTC1148
LTC1148-3.3/LTC1148-5
114835fd
CCHARA TERIST
ICS
UW
AT
Y
P
I
CA
LPER
F
O
R
C
E
Current Sense Threshold Voltage
TEMPERATURE (°C)
0
0
SENSE VOLTAGE (mV)
25
50
75
175
125
20
40
150
100
60
80
100
MAXIMUM
THRESHOLD
MINIMUM
THRESHOLD
LTC1148 • TPC09
Off Time vs V
OUT
OUTPUT VOLTAGE (V)
0
OFF TIME (µs)
40
50
60
4
LTC1148 • TPC08
30
20
0
1
23
10
80
70
5
LTC1148-5
LTC1148-3.3
V
SENSE
= V
OUT
Gate Charge Supply Current
OPERATING FREQUENCY (kHz)
20
0
GATE CHARGE CURRENT (mA)
4
8
12
28
20
80
140
24
16
200
260
Q
N
+ Q
P
= 100nC
Q
N
+ Q
P
= 50nC
LTC1148 • TPC07
P-DRIVE (Pin 1): High Current Drive for Top P-Channel
MOSFET. Voltage swing at this pin is from V
IN
to ground.
NC (Pin 2): No Connection. Can connect to power ground.
V
IN
(Pin 3): Main Supply Pin. Must be closely decoupled
to power ground Pin 12.
C
T
(Pin 4): External capacitor C
T
from Pin 4 to ground sets
the operating frequency. The actual frequency is also
dependent upon the input voltage.
INTV
CC
(Pin 5): Internal Supply Voltage, Nominally 3.3V.
Can be decoupled to signal ground. Do not externally load
this pin.
I
TH
(Pin 6): Gain Amplifier Decoupling Point. The current
comparator threshold increases with the Pin 6 voltage.
SENSE
(Pin 7): Connects to internal resistive divider
which sets the output voltage in LTC1148-3.3 and
LTC1148-5 versions. Pin 7 is also the (–) input for the
current comparator.
SENSE
+
(Pin 8): The (+) Input to the Current Comparator.
A built-in offset between Pins 7 and 8 in conjunction with
R
SENSE
sets the current trip threshold.
V
FB
(Pin 9): For the LTC1148 adjustable version, Pin 9
serves as the feedback pin from an external resistive
divider used to set the output voltage. On LTC1148-3.3
and LTC1148-5 versions this pin is not used.
SHUTDOWN (Pin 10): When grounded, the LTC1148
series operates normally. Pulling Pin 10 high holds both
MOSFETs off and puts the LTC1148 series in micropower
shutdown mode. Requires CMOS logic signal with t
R
,
t
F
< 1µs, should not be left floating.
SGND (Pin 11): Small-Signal Ground. Must be routed
separately from other grounds to the (–) terminal of C
OUT
.
PGND (Pin 12): Driver Power Ground. Connects to source
of N-channel MOSFET and the (–) terminal of C
IN
.
NC (Pin 13): No Connection. Can connect to power ground.
N-DRIVE (Pin 14): High Current Drive for Bottom
N-Channel MOSFET. Voltage swing at Pin 14 is from
ground to V
IN
.
PI FU CTIO S
U
UU
6
LTC1148
LTC1148-3.3/LTC1148-5
114835fd
+
1 P-DRIVE
14
3V
IN
12
PGND
N-DRIVE
R
S
Q
+
C
25mV TO 150mV
6
13k
I
TH
1.25V
10 5
REFERENCE
+
SHUTDOWN INTV
CC
V
OS
+
V
G
8
SENSE
+
9
ADJUSTABLE
VERSION
V
FB
100k
5pF
+
V
TH1
T
+
V
TH2
S
SLEEP
11
SGND
4
C
T
OFF-TIME
CONTROL
V
IN
SENSE
V
FB
SENSE
7
LTC1148 • FD
FU CTIO AL DIAGRA
UUW
Pin 9 connection shown for LTC1148-3.3 and LTC1148-5; changes create LTC1148.
TEST CIRCUIT
+
1
2
3
4
5
6
7
14
13
12
11
10
9
8
P-DRIVE
NC
V
IN
C
T
INTV
CC
I
TH
SENSE
N-DRIVE
NC
PGND
SGND
SHUTDOWN
NC (V
FB
)
SENSE
+
1000pF
V
7
TO
V
8
+
V
10
R
SENSE
0.05
75k
25k
100pF
+
V
OUT
440µF
50µH
1µF
IRFZ34
1N5818
330µF
+
IRF9Z34
+
V
IN
+
V
7
1k
3300pF10nF390pF
LTC1148
+

LTC1148CS#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Hi Eff Sync Buck Sw Regs
Lifecycle:
New from this manufacturer.
Delivery:
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