LTC3556
22
3556f
greater than 0.8V. A variety of capacitor sizes can be used
for C
FB
but a value of 10pF is recommended for most ap-
plications. Experimentation with capacitor sizes between
2pF and 22pF may yield improved transient response.
Buck Regulator Operating Modes
The LTC3556’s buck regulators include four possible op-
erating modes to meet the noise/power needs of a variety
of applications.
In pulse skip mode, an internal latch is set at the start of
every cycle which turns on the main P-channel MOSFET
switch. During each cycle, a current comparator compares
the peak inductor current to the output of an error amplifier.
The output of the current comparator resets the internal
latch which causes the main P-channel MOSFET switch to
turn off and the N-channel MOSFET synchronous rectifier
to turn on. The N-channel MOSFET synchronous rectifier
turns off at the end of the 2.25MHz cycle or if the current
through the N-channel MOSFET synchronous rectifier
drops to zero. Using this method of operation, the error
amplifier adjusts the peak inductor current to deliver the
required output power. All necessary compensation is
internal to the switching regulator requiring only a single
ceramic output capacitor for stability. At light loads in PWM
mode, the inductor current may reach zero on each pulse
which will turn off the N-channel MOSFET synchronous
rectifier. In this case, the switch node (SW) goes high
impedance and the switch node voltage will “ring.” This
is discontinuous mode operation and is normal behavior
for a switching regulator. At very light loads in pulse skip
mode, the buck regulators will automatically skip pulses
as needed to maintain output regulation.
At high duty cycles (V
OUTx
> V
INx
/2) it is possible for the
inductor current to reverse, causing the buck regulator
to operate continuously at light loads. This is normal and
regulation is maintained, but the supply current will increase
to several milliamperes due to continuous switching.
In forced Burst Mode operation, the buck regulators use a
constant-current algorithm to control the inductor current.
By controlling the inductor current directly and using a
hysteretic control loop, both noise and switching losses
are minimized. In this mode output power is limited. While
in forced Burst Mode operation, the output capacitor is
charged to a voltage slightly higher than the regulation
point. The step-down converter then goes into sleep mode,
during which the output capacitor provides the load cur
rent. In sleep mode, most of the regulators circuitry is
powered down, helping conserve battery power. When
the output voltage drops below a predetermined value, the
buck regulator circuitry is powered on and another burst
cycle begins. The duration for which the buck regulator
operates in sleep mode depends on the load current. The
sleep time decreases as the load current increases. The
maximum output current in forced Burst Mode operation
is about 100mA for buck regulators 1 and 2. The buck
regulators will not enter sleep mode if the maximum output
current is exceeded in forced Burst Mode operation and
the output will drop out of regulation. Forced Burst Mode
operation provides a significant improvement in efficiency
at light loads at the expense of higher output ripple when
compared to pulse skip mode. For many noise-sensitive
systems, forced Burst Mode operation might be undesirable
at certain times (i.e., during a transmit or receive cycle
of a wireless device), but highly desirable at others (i.e.,
when the device is in low power standby mode). The I
2
C
port can be used to enable or disable forced Burst Mode
operation at any time, offering both low noise and low
power operation when they are needed.
In Burst Mode operation, the buck regulator automati-
cally switches between fixed frequency PWM operation
and hysteretic control as a function of the load current.
At light loads, the buck regulators operate in hysteretic
mode in much the same way as described for the forced
Burst Mode operation. Burst Mode operation provides
slightly less output ripple at the expense of slightly lower
efficiency than forced Burst Mode operation. At heavy
loads, the buck regulator operates in the same manner
as pulse skip operation does at high loads. For applica-
tions that can tolerate some output ripple at low output
currents, Burst Mode operation provides better efficiency
than pulse skip at light loads while still providing the full
specified output current of the buck regulator.
Finally, the buck regulators have an LDO mode that gives
a DC option for regulating their output voltages. In LDO
mode, the buck regulators are converted to linear regula-
OPERATION
LTC3556
23
3556f
tors and deliver continuous power from their SWx pins
through their respective inductors. This mode gives the
lowest possible output noise as well as low quiescent
current at light loads.
The buck regulators allow mode transition on the fly,
providing seamless transition between modes even under
load. This allows the user to switch back and forth between
modes to reduce output ripple or increase low current
efficiency as needed.
Buck Regulator in Shutdown
The buck regulators are in shutdown when not enabled for
operation. In shutdown, all circuitry in the buck regulator
is disconnected from the buck regulator input supply
leaving only a few nanoamperes of leakage current. The
buck regulator outputs are individually pulled to ground
through a 10k resistor on the switch pins (SW1 and SW2)
when in shutdown.
Buck Regulator Dropout Operation
It is possible for a buck regulators input voltage, V
INX
, to
approach its programmed output voltage (e.g., a battery
voltage of 3.4V with a programmed output voltage of 3.3V).
When this happens, the PMOS switch duty cycle increases
until it is turned on continuously at 100%. In this dropout
condition, the respective output voltage equals the buck
regulators input voltage minus the voltage drops across
the internal P-channel MOSFET and the inductor.
Buck Regulator Soft-Start Operation
Soft-start is accomplished by gradually increasing the
peak inductor current for each buck regulator over a
500s period. This allows each output to rise slowly,
helping minimize the battery surge current. A soft-start
cycle occurs whenever a given buck regulator is enabled,
or after a fault condition has occurred (thermal shutdown
or UVLO). A soft-start cycle is not triggered by changing
operating modes. This allows seamless output operation
when transitioning between forced Burst Mode, Burst
Mode, pulse skip mode or LDO operation.
Buck Regulator Switching Slew Rate Control
The buck regulators contain new patent pending circuitry
to limit the slew rate of the switch node (SW1 and SW2).
This new circuitry is designed to transition the switch node
over a period of a couple of nanoseconds, significantly
reducing radiated EMI and conducted supply noise.
Low Supply Operation
The LTC3556 incorporates an undervoltage lockout circuit
on V
OUT
which shuts down both buck regulators (as well
as the buck-boost) when V
OUT
drops below V
OUTUVLO
.
This UVLO prevents unstable operation.
Buck-Boost DC/DC Switching Regulator
The LTC3556 contains a 2.25MHz constant-frequency volt-
age mode buck-boost switching regulator. The regulator
provides up to 1A of output load current. The buck-boost
can be programmed to a minimum output voltage of 2.5V
and can be used to power a microcontroller core, micro-
controller I/O, memory, disk drive or other logic circuitry.
When controlled by I
2
C, the buck-boost has programmable
set-points for on-the-fl y power savings. To suit a variety of
applications, a selectable mode function allows the user to
trade off noise for effi ciency. Two modes are available to
control the operation of the LTC3556’s buck-boost regula-
tor. At moderate to heavy loads, the constant frequency
PWM mode provides the least noise switching solution. At
lighter loads Burst Mode operation may be selected. The
full-scale output voltage is programmed by a user-supplied
resistive divider returned to the FB3 pin. An error amplifi er
compares the divided output voltage with a reference and
adjusts the compensation voltage accordingly until the FB3
has stabilized to the selected reference voltage (0.425V to
0.8V). The buck-boost regulator also includes a soft-start to
limit inrush current and voltage overshoot when powering
on, short circuit current protection, and switch node slew
limiting circuitry for reduced radiated EMI.
OPERATION
LTC3556
24
3556f
Input Current Limit
The input current limit comparator will shut the input
PMOS switch off once current exceeds 2.5A (typical).
The 2.5A input current limit also protects against a
grounded V
OUT3
node.
Output Overvoltage Protection
If the FB3 node were inadvertently shorted to ground, then
the output would increase indefi nitely with the maximum
current that could be sourced from V
IN3
. The LTC3556
protects against this by shutting off the input PMOS if
the output voltage exceeds 5.6V (typical).
Low Output Voltage Operation
When the output voltage is below 2.65V (typical) during
startup, Burst Mode operation is disabled and switch D
is turned off (allowing forward current through the well
diode and limiting reverse current to 0mA).
Buck-Boost Regulator PWM Operating Mode
In PWM mode the voltage seen at FB3 is compared to the
selected reference voltage (0.425V to 0.8V). From the FB3
voltage an error amplifi er generates an error signal seen
at V
C3
. This error signal commands PWM waveforms
that modulate switches A, B, C and D. Switches A and B
operate synchronously as do switches C and D. If V
IN3
is
signifi cantly greater than the programmed V
OUT3
, then the
converter will operate in buck mode. In this case switches
A and B will be modulated, with switch D always on (and
switch C always off), to step down the input voltage to
the programmed output. If V
IN3
is signifi cantly less than
the programmed V
OUT3
, then the converter will operate in
boost mode. In this case switches C and D are modulated,
with switch A always on (and switch B always off), to step
up the input voltage to the programmed output. If V
IN3
is
close to the programmed V
OUT3
, then the converter will
operate in 4-switch mode. In this mode the switches se-
quence through the pattern of AD, AC, BD to either step the
input voltage up or down to the programmed output.
Buck-Boost Regulator Burst Mode Operation
In Burst Mode operation, the buck-boost regulator uses
a hysteretic FB3 voltage algorithm to control the output
voltage. By limiting FET switching and using a hysteretic
control loop, switching losses are greatly reduced. In this
mode output current is limited to 50mA typical. While
operating in Burst Mode operation, the output capacitor
is charged to a voltage slightly higher than the regulation
point. The buck-boost converter then goes into a sleep
state, during which the output capacitor provides the load
current. The output capacitor is charged by charging the
inductor until the input current reaches 250mA typical
and then discharging the inductor until the reverse current
reaches 0mA typical. This process is repeated until the
feedback voltage has charged to 6mV above the regulation
point. In the sleep state, most of the regulators circuitry is
powered down, helping to conserve battery power. When
the feedback voltage drops 6mV below the regulation
point, the switching regulator circuitry is powered on and
another burst cycle begins. The duration for which the
regulator sleeps depends on the load current and output
capacitor value. The sleep time decreases as the load cur-
rent increases. The maximum load current in Burst Mode
operation is 50mA typical. The buck-boost regulator will
not go to sleep if the current is greater than 50mA, and
if the load current increases beyond this point while in
Burst Mode operation the output will lose regulation. Burst
Mode operation provides a signifi cant improvement in ef-
ciency at light loads at the expense of higher output ripple
when compared to PWM mode. For many noise-sensitive
systems, Burst Mode operation might be undesirable at
certain times (i.e., during a transmit or receive cycle of a
wireless device), but highly desirable at others (i.e., when
the device is in low power standby mode). The B6 and
B5 bits of the I
2
C port are used to enable or disable Burst
Mode operation at any time, offering both low noise and
low power operation when they are needed.
OPERATION

LTC3556EUFD#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management High Efficiency USB Pwr Mgr + B/B + Dual Buck DC/DC
Lifecycle:
New from this manufacturer.
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