4
LTC1416
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
f
SAMPLE(MAX)
Maximum Sampling Frequency ● 400 kHz
t
CONV
Conversion Time ● 1.5 1.9 2.2 µs
t
ACQ
Acquisition Time (Note 9) ● 100 400 ns
t
ACQ+CONV
Acquisition + Conversion Time ● 2 2.5 µs
t
1
CS to RD Setup Time (Notes 9, 10) ● 0ns
t
2
CS↓ to CONVST↓ Setup Time (Notes 9, 10) ● 10 ns
t
3
CS↓ to SHDN↓ Setup Time (Notes 9, 10) ● 10 ns
t
4
SHDN↑ to CONVST↓ Wake-Up Time CS = 0V (Note 10) 400 ns
t
5
CONVST Low Time (Notes 10, 11) ● 40 ns
t
6
CONVST to BUSY Delay C
L
= 25pF 25 ns
● 50 ns
t
7
Data Ready Before BUSY↑ (Note 9) 75 100 ns
● 50 ns
t
8
Delay Between Conversions (Note 10) ● 40 ns
t
9
Wait Time RD↓ After BUSY↑ ● –5 ns
t
10
Data Access Time After RD↓ C
L
= 25pF 15 25 ns
● 35 ns
C
L
= 100pF 20 35 ns
● 50 ns
t
11
Bus Relinquish Time 820 ns
0°C ≤ T
A
≤ 70°C ● 25 ns
–40°C ≤ T
A
≤ 85°C ● 30 ns
t
12
RD Low Time ● t
10
ns
t
13
CONVST High Time ● 40 ns
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from –0.5LSB when
the output code flickers between 0000 0000 0000 00 and
1111 1111 1111 11.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: The falling CONVST edge starts a conversion. If CONVST returns
high at a critical point during the conversion it can create small errors. For
best results ensure that CONVST returns high either within 900ns after the
start of the conversion or after BUSY rises.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND and
AGND wired together unless otherwise noted.
Note 3: When these pin voltages are taken below V
SS
or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below V
SS
or above V
DD
without latchup.
Note 4: When these pin voltages are taken below V
SS
, they will be clamped
by internal diodes. This product can handle input currents greater than
100mA below V
SS
without latchup. These pins are not clamped to V
DD
.
Note 5: V
DD
= 5V, V
SS
= –5V, f
SAMPLE
= 400kHz, t
r
= t
f
= 5ns unless
otherwise specified.
Note 6: Linearity, offset and full-scale specifications apply for a single-
ended A
IN
+
input with A
IN
–
grounded.
POWER REQUIRE E TS
WU
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
SS
Negative Supply Current ● 710 mA
Nap Mode SHDN = 0V, CS = 0V 20 µA
Sleep Mode SHDN = 0V, CS = 5V 15 µA
P
DISS
Power Dissipation ● 70 100 mW
Power Dissipation, Nap Mode SHDN = 0V, CS = 0V 4 6 mW
Power Dissipation, Sleep Mode SHDN = 0V, CS = 5V 0.1 mW
The ● denotes specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. (Note 5)
TI I G CHARACTERISTICS
UW
The ● denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 5, see Figures 15 to 21)
