Single-/Dual-Supply, High Voltage Isolated
IGBT Gate Driver with Miller Clamp
Data Sheet
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FEATURES
4 A peak drive output capability
Output power device resistance: <1 Ω
Desaturation protection
Isolated desaturation fault reporting
Soft shutdown on fault
Miller clamp output with gate sense input
Isolated fault and ready functions
Low propagation delay: 55 ns typical
Minimum pulse width: 50 ns
Operating temperature range: −40°C to +125°C
Output voltage range to 30 V
Input voltage range from 2.3 V to 6 V
Output and input undervoltage lockout (UVLO)
Creepage distance: 7.8 mm minimum
100 kV/µs common-mode transient immunity (CMTI)
20 year lifetime for 600 V rms or 1092 V dc working voltage
Safety and regulatory approvals (pending)
5 kV ac for 1 minute per UL 1577
CSA Component Acceptance Notice 5A
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
V
IORM
= 849 V peak (reinforced/basic)
APPLICATIONS
MOSFET/IGBT gate drivers
PV inverters
Motor drives
Power supplies
GENERAL DESCRIPTION
The ADuM4135 is a single-channel gate driver specifically
optimized for driving insulated gate bipolar transistors (IGBTs).
Analog Devices, Inc., iCoupler® technology provides isolation
between the input signal and the output gate drive.
The ADuM4135 includes a Miller clamp to provide robust
IGBT turn-off with a single-rail supply when the gate voltage
drops below 2 V. Operation with unipolar or bipolar secondary
supplies is possible, with or without the Miller clamp operation.
The Analog Devices chip scale transformers also provide
isolated communication of control information between the
high voltage and low voltage domains of the chip. Information
on the status of the chip can be read back from dedicated
outputs. Control of resetting the device after a fault on the
secondary is performed on the primary side of the device.
Integrated onto the ADuM4135 is a desaturation detection
circuit that provides protection against high voltage short-
circuit IGBT operation. The desaturation protection contains
noise reducing features such as a 300 ns masking time after a
switching event to mask voltage spikes due to initial turn-on.
An internal 500 µA current source allows low device count and
the internal blanking switch allows the addition of an external
current source if more noise immunity is needed.
The secondary UVLO is set to 11 V with common IGBT
threshold levels taken into consideration.
FUNCTIONAL BLOCK DIAGRAM
13082-001
MASTER
LOGIC
PRIMARY
V
SS1
1
1
2
2
2
2
2
1
1
1
V
SS2
2V
V
DD2
V
OUT_ON
V
OUT_OFF
GND
2
DESAT
V
DD1
V
SS1
V
I
+
V
I
–
READY
GATE_SENSE
FAULT
RESET
UVLO
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
MASTER
LOGIC
SECONDARY
TSD
ENCODE
DECODE
DECODE
ENCODE
CLAMP
LOGIC
UVLO
V
SS2
9
9V
ADuM4135
NOTES
1. GROUNDS ON PRIMARY AND SECONDARY SIDE ARE
ISOLATED FROM EACH OTHER.
Figure 1.
