13
FN9040.2
October 4, 2005
The response time is the time interval required to slew the
inductor current from an initial current value to the load
current level. During this interval the difference between the
inductor current and the transient current level must be
supplied by the output capacitor(s). Minimizing the response
time can minimize the output capacitance required. Also, if
the load transient rise time is slower than the inductor
response time, as in a hard drive or CD drive, it reduces the
requirement on the output capacitor.
The maximum capacitor value required to provide the full,
rising step, transient load current during the response time of
the inductor is:
where, C
OUT
is the output capacitor(s) required, L
O
is the
output inductor, I
TRAN
is the transient load current step, V
IN
is the input voltage, V
O
is output voltage, and DV
OUT
is the
drop in output voltage allowed during the load transient.
High frequency capacitors initially supply the transient
current and slow the load rate-of-change seen by the bulk
capacitors. The bulk filter capacitor values are generally
determined by the ESR (Equivalent Series Resistance) and
voltage rating requirements as well as actual capacitance
requirements.
The output voltage ripple is due to the inductor ripple current
and the ESR of the output capacitors as defined by:
where, I
L
is calculated in the Inductor Selection section.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load
circuitry for specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching-regulator applications at 300kHz for the bulk
capacitors. In most cases, multiple small-case electrolytic
capacitors perform better than a single large-case capacitor.
The stability requirement on the selection of the output
capacitor is that the ‘ESR zero’, f
Z
, be between 1.2kHz and
30kHz. This range is set by an internal, single compensation
zero at 6kHz. The ESR zero can be a factor of five on either
side of the internal zero and still contribute to increased
phase margin of the control loop. Therefore,
In conclusion, the output capacitors must meet three criteria:
1. They must have sufficient bulk capacitance to sustain the
output voltage during a load transient while the output
inductor current is slewing to the value of the load
transient,
2. The ESR must be sufficiently low to meet the desired
output voltage ripple due to the output inductor current,
and
3. The ESR zero should be placed, in a rather large range,
to provide additional phase margin.
The recommended output capacitor value for the ISL6440 is
between 150µF to 680µF, to ensure stability when using the
components in the typical application schematic. Use of
aluminum electrolytic, POSCAP, or tantalum type capacitors
is recommended. Use of low ESR ceramic capacitors is
possible but would take more rigorous loop analysis to
ensure stability.
Output Inductor Selection
The PWM converters require output inductors. The output
inductor is selected to meet the output voltage ripple
requirements. The inductor value determines the converter’s
ripple current and the ripple voltage is a function of the ripple
current and output capacitor(s) ESR. The ripple voltage
expression is given in the capacitor selection section and the
ripple current is approximated by the following equation:
For the ISL6440, use Inductor values between 4.7µH to
10µH when using the component values in the Typical
Application Schematic for optimal compensation. Other
inductor values can be used but with a more rigorous design
for compensation.
Input Capacitor Selection
The important parameters for the bulk input capacitor(s) are
the voltage rating and the RMS current rating. For reliable
operation, select bulk input capacitors with voltage and
current ratings above the maximum input voltage and largest
RMS current required by the circuit. The capacitor voltage
rating should be at least 1.25 times greater than the
maximum input voltage and 1.5 times is a conservative
guideline. The AC RMS Input current varies with the load.
The total RMS current supplied by the input capacitance is:
where,
DC is duty cycle of the respective PWM.
Depending on the specifics of the input power and its
impedance, most (or all) of this current is supplied by the
input capacitor(s). Figure 17 shows the advantage of having
the PWM converters operating out of phase. If the
converters were operating in phase, the combined RMS
current would be the algebraic sum, which is a much larger
C
OUT
L
O
()I
TRAN
()
2
2V
IN
V
O
()DV
OUT
()
---------------------------------------------------------- -=
V
RIPPLE
I
L
ESR()=
C
OUT
1
2Π ESR()f
Z
()
-------------------------------------=
I
L
V
IN
V
OUT
()V
OUT
()
f
S
()L()V
IN
()
----------------------------------------------------------=
I
RMS
I
RMS1
2
I
RMS2
2
+=
I
RMSx
DC DC
2
=
ISL6440
14
FN9040.2
October 4, 2005
value as shown. The combined out-of-phase current is the
square root of the sum of the square of the individual
reflected currents and is significantly less than the combined
in-phase current.
Use a mix of input bypass capacitors to control the voltage
ripple across the MOSFETs. Use ceramic capacitors for the
high frequency decoupling and bulk capacitors to supply the
RMS current. Small ceramic capacitors can be placed very
close to the upper MOSFET to suppress the voltage induced
in the parasitic circuit impedances.
For board designs that allow through-hole components, the
Sanyo OS-CON® series offer low ESR and good
temperature performance. For surface mount designs, solid
tantalum capacitors can be used, but caution must be
exercised with regard to the capacitor surge current rating.
These capacitors must be capable of handling the surge-
current at power-up. The TPS series available from AVX is
surge current tested.
FIGURE 17. INPUT RMS CURRENT vs LOAD
12345
3.3V AND 5V LOAD CURRENT
INPUT RMS CURRENT
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
IN PHASE
OUT OF PHASE
5V
3.3V
ISL6440
15
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN9040.2
October 4, 2005
ISL6440
Shrink Small Outline Plastic Packages (SSOP)
Quarter Size Outline Plastic Packages (QSOP)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch)
per side.
5. The chamfer on the body is optional. If it is not present, a visual in-
dex feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dam-
bar protrusion shall be 0.10mm (0.004 inch) total in excess of “B”
dimension at maximum material condition.
10. Controlling dimension: INCHES. Converted millimeter dimensions
are not necessarily exact.
α
INDEX
AREA
E
D
N
123
-B-
0.17(0.007) C AM BS
e
-A-
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45°
C
H
0.25(0.010) BM M
L
0.25
0.010
GAUGE
PLANE
A2
M24.15
24 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
(0.150” WIDE BODY)
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.053 0.069 1.35 1.75 -
A1 0.004 0.010 0.10 0.25 -
A2 - 0.061 - 1.54 -
B 0.008 0.012 0.20 0.30 9
C 0.007 0.010 0.18 0.25 -
D 0.337 0.344 8.55 8.74 3
E 0.150 0.157 3.81 3.98 4
e 0.025 BSC 0.635 BSC -
H 0.228 0.244 5.80 6.19 -
h 0.0099 0.0196 0.26 0.49 5
L 0.016 0.050 0.41 1.27 6
N24 247
α
-
Rev. 2 6/04

ISL6440IAZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers DUAL PWM CONTRLR+LIN EAR CONTRLR 300KHZ
Lifecycle:
New from this manufacturer.
Delivery:
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