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NB7NPQ7021MMUTXG

P1-P3P4-P6P7-P9
© Semiconductor Components Industries, LLC, 2017
December, 2017 − Rev. 1
1 Publication Order Number:
NB7NPQ7021M/D
NB7NPQ7021M
3.3 V USB 3.1 Dual Channel
Linear Redriver
Description
The NB7NPQ7021M is a 3.3 V dual channel redriver for USB 3.1
Gen 1 and USB 3.1 Gen 2 applications that supports both 5 Gbps and
10 Gbps data rates. Signal integrity degrades from PCB traces,
transmission cables, and inter−symbol interference (ISI). The
NB7NPQ7021M compensates for these losses by engaging varying
levels of equalization at the input receiver, and flat gain amplification
on the output transmitter. The Flat Gain and Equalization are
controlled by four level control pins. Each channel has a set of
independent control pins to make signal optimization possible.
After power up, the NB7NPQ7021M periodically checks both of the
TX output pairs for a receiver connection. When the receiver is
detected on both channels the RX termination becomes enabled and
the NB7NPQ7021M is set to perform the redriver function.
The NB7NPQ7021M comes in a small 3 x 3 mm UQFN16 package
and is specified to operate across the entire industrial temperature
range of –40°C to 85°C.
Features
• 3.3 V ± 5% Power Supply
• Supports USB 3.1 Gen 1 and USB 3.1 Gen 2 Data Rates
• Automatic Receiver Termination Detection
• Integrated Input and Output Termination
• Independent, Selectable Equalization and Flat Gain
• Hot−Plug Capable
• ESD Protection ±4 kV HBM
• Operating Temperature Range: –40°C to 85°C
• Small 3 x 3 x 0.5 mm UQFN16 Package, Flow Through Design that
ease PCB layout
• This is a Pb−Free Device
Typical Applications
• USB3.1 Type−C and Type−A Signal Routing
• Mobile Phone and Tablet
• Computer and Laptop
• Docking Station and Dongle
• Active Cable, Back Planes
• Gaming Console, Smart T.V.
Device Package Shipping
†
ORDERING INFORMATION
NB7NPQ7021MMUTXG UQFN16
(Pb−Free)
3000 /
Tape & Ree
l
UQFN16
CASE 523AF
MARKING
DIAGRAM
www.onsemi.com
(Note: Microdot may be in either location)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
s
Brochure, BRD8011/D.
1
NB7N
7021
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
NB7NPQ7021M
www.onsemi.com
2
Figure 1. Logic Diagram of NB7NPQ7021M Figure 2. UQFN16 Package Pinout
(Top View)
A_TX−
A_TX+
B_RX−
B_RX+
12
11
10
9
A_RX−
A_RX+
B_TX−
B_TX+
1
2
3
4
GND
CTRL_A1
CTRL_A0
VCC
16 15 14 13
5678
VCC
CTRL_B0
CTRL_B1
GND
A_TX−
A_TX+
B_RX−
B_RX+
A_RX−
A_RX+
B_TX−
B_TX+
CTRL_A1
CTRL_B0
CTRL_A0
CTRL_B1
Detect
Termination
Termination
Receiver/
Equalizer
Driver
Driver
Receiver/
Equalizer
Detect
Termination
Termination
Table 1. PIN DESCRIPTION
Pin Number
Pin Name Type
Description
1
A_RX-
DIFF IN
Channel A Differential input pair for 5 / 10 Gbps USB signals. Must be externally AC−coupled.
2 A_RX+
3 B_TX−
DIFF OUT
Channel B Differential output for 5 / 10 Gbps USB signals. Must be externally AC−coupled.
4 B_TX+
5 VCC Power 3.3 V power supply. VCC pins must be externally connected to power supply to guarantee
proper operation.
6 CTRL_B0
LVCMOS IN Control pin “B0” for equalization and flat gain on Channel B. 4−state input with integrated pull−
up and pull−down resistors. See Table 2.
7 CTRL_B1
LVCMOS IN Control pin “B1” for equalization and flat gain on Channel B. 4−state input with integrated pull−
up and pull−down resistors. See Table 2.
8 GND GND
Reference Ground. GND pins must be externally connected to power supply to guarantee
proper operation.
9 B_RX+
DIFF IN
Channel B Differential input pair for 5 / 10 Gbps USB signals. Must be externally AC−coupled.
10 B_RX−
11 A_TX+
DIFF OUT
Channel A Differential output for 5 / 10 Gbps USB signals. Must be externally AC−coupled.
12
A_TX-
13 VCC Power 3.3 V power supply. VCC pins must be externally connected to power supply to guarantee
proper operation.
14 CTRL_A0 LVCMOS IN
Control pin “A0” for equalization and flat gain on Channel A. 4−state input with integrated pull−
up and pull−down resistors. See Table 2.
15 CTRL_A1 LVCMOS IN
Control pin “A1” for equalization and flat gain on Channel A. 4−state input with integrated pull−
up and pull−down resistors. See Table 2.
16 GND GND
Reference Ground. GND pins must be externally connected to power supply to guarantee
proper operation.
EP GND GND
Exposed pad (EP). EP on the package bottom is thermally connected to the die for improved
heat transfer out of the package. The pad is not electrically connected to the die, but is recom−
mended to be soldered to GND on the PC Board.
NB7NPQ7021M
www.onsemi.com
3
DEVICE CONFIGURATION
Table 2. CONTROL PIN EFFECTS (Typical Values)
Setting #
Channel A Channel B
Equalization Flat Gain
CTRL_A1 CTRL_A0 CTRL_B1 CTRL_B0
(dB) (dB)
1 L L L L 5 0
2 L R L R 7 0
3 L F L F 8 0
4 L H L H 9 0
5 R L R L 10 0
6 R R R R 3 2
7 R F R F 4 2
8 R H R H 5 2
9 F L F L 7 2
10 F R F R 8 2
11 (Default) F F F F 8 −1
12 F H F H 5 −1
13 H L H L 7 −1
14 H R H R 9 −1
15 H F H F 11 −1
16 H H H H 7 −1
NOTE: Equalization and DC flat Gain may be set by adjusting the voltage to the control pins. There are 4 specific levels, High “H”, Low
“L”, Rexternal “R”, and Float “F”. Please see Table 7 for voltage levels.
Table 3. ATTRIBUTES
Parameter
ESD Protection Human Body Model
Charged Device Model
≤ 4 kV
≤ 1.5 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−O @ 0.125 in
Transistor Count 20330
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 4. ABSOLUTE MAXIMUM RATINGS Over operating free−air temperature range (unless otherwise noted)
Parameter Description Min Max Unit
Supply Voltage (Note 2) V
CC
−0.5 4.6 V
Voltage range at any input or output terminal
Differential I/O −0.5 1.89 V
LVCMOS inputs −0.5 V
CC
+ 0.5 V
Storage Temperature Range, T
SG
−65 150
°C
Maximum Junction Temperature, T
J
125
°C
Operating Ambient Temperature Range, T
A
−40 85
°C
Junction−to−Ambient Thermal Resistance @ 500 lfm, q
JA
(Note 3)
34
°C/W
Wave Solder, Pb−Free, T
SOL
265
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. All voltage values are with respect to the GND terminals.
3. JEDEC standard multilayer board − 2S2P (2 signal, 2 power).
P1-P3P4-P6P7-P9

NB7NPQ7021MMUTXG

Mfr. #:
Buy NB7NPQ7021MMUTXG
Manufacturer:
ON Semiconductor
Description:
USB Interface IC DUAL CHN USB 3.0/3.1 LINEAR REDRIVER
Lifecycle:
New from this manufacturer.
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