NB7NPQ7021MMUTXG

NB7NPQ7021M
www.onsemi.com
7
TYPICAL APPLICATION
Figure 5. USB 3.1 Host Side NB7NPQ7021M Application
Receiver/
Equalizer
Driver
Receiver/
Equalizer
Driver
USB 3.1
Controller
USB 3.1
Receptacle
(Type-C or Type-A)
100nF
100nF
100nF
100nF
100nF
100nF
330-470nF
330-470nF
NB7NPQ7021M
A RX A TX
B TX
B RX
ESD
Protection
220K
220K
Up to 11 inches of FR4 Up to 3 inches of FR4
Table 11. DESIGN REQUIREMENTS
Design Parameter Value
Supply Voltage 3.3 V nominal, (3.135 V to 3.465 V)
Operation Mode (Control Pin Selection) Floating by Default, adjust for application losses See Table 2
AC Coupling Capacitors 100 nF nominal, 75 nF to 265 nF, see Figure 5
R
external
68 kW, ±10%
RX Pull Down Resistors at Receptacle
200 KW to 220 KW
Power Supply Capacitors
100 nF to GND close to each Vcc pin, and 10 mF to GND on the Vcc plane
Trace loss of FR4 before NB7NPQ7021M Up to 11 inches
Trace loss of FR4 after NB7NPQ7021M Up To 3 inches. Keep as short as possible for best performance.
Linear Range at 5GHz 900 mV differential
DC Flat Gain Options −1 dB, 0 dB, 2 dB
Equalization Options 3 to 11 dB
Differential Trace Impedance
90 W ±10%
9. Trace loss of FR4 was estimated to have 1 dB of loss per 1 inch of FR4 length with matched impedance and no VIAS.
Typical Layout Practices
RX and TX pairs should maintain as close to a 90 W
differential impedance as possible.
Limit the number of vias used on each data line. It is
suggested that 2 or fewer are used.
Traces should be routed as straight and symmetric as
possible.
RX and TX differential pairs should always be placed
and routed on the same layer directly above a ground
plane. This will help reduce EMI and noise on the data
lines.
Routing angles should be obtuse angles and kept to 135
degrees or larger.
To minimize crosstalk, TX and RX data lines should be
kept away from other high speed signals.
NB7NPQ7021M
www.onsemi.com
8
Figure 6. Typical Application Diagram for Implementing a USB 3.1 Type−A Port
RX coupling capacitors are suggested to remain 330 nF or higher. In some cases; such as when
the NB7NPQ7021M is utilized with a multiplexer, a higher capacitor value may be necessary.
Place the 100nF and
10uF capacitors to
ground on the VCC Bus
near the NB7NPQ7021M
to filter noise to the
VCC pins.
VCC Bus Requirements
3.3V
3.3V
3.3V
USB VBUS
100n
100n
100n
100n
ESD8704
220K220K
U9
USB3.1 Host
D−
D+
Host SSTX−
Host SSTX+
Host SSRX−
Host SSRX+
NB7NPQ7021M
U2
A_RX−
1
A_RX+
2
B_TX−
3
B_TX+
4
VCC1
5
CTRL_B0
6
CTRL_B1
7
GND1
8
B_RX+
9
B_RX−
10
A_TX+
11
A_TX−
12
VCC2
13
CTRL_A0
14
CTRL_A1
15
GND2
16
330n
USB Type−A Connector
VBUS
1
D−
2
D+
3
GND
4
SSRX−
5
SSRX+
6
GND_Drain
7
SSTX−
8
SSTX+
9
330n
100n
100n
100n
10u
Vcc, GND, Float, or 68K
Vcc, GND, Float, or 68K
TX−
Vcc, GND, Float , or 68KR
Vcc, GND, Float, or 68KR
RX−
TX+
RX+
VCC
Figure 7. Typical Application Diagram for Implementing a USB 3.1 Type−C Port
Note: For the best performance it is recommended to place two redrivers after the
multiplexer. Only the most commonly used implementation can be seen in Figure 7.
USB Type−C Connector
VCC Bus Requirements
Place the 100nF and
10uF capacitors to
ground on the VCC Bus
near the NB7NPQ7021M
to filter noise to the
VCC pins.
3.3V
3.3V
3.3V
USB3_TX4_N
USB3_TX4_P
USB3_RX4_N
USB3_RX4_P
ESD8704
1Meg
330n
330n
330n
330n
100n
220K
220n
10u
330n
220n
1Meg
1Meg
100n
220n
ESD8704
220n
220n
220K
100n
220K
1Meg
2:1 MUX
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
100n
220n
220K
330n
100n
NB7NPQ7021M
A_RX−
1
A_RX+
2
B_TX−
3
B_TX+
4
VCC1
5
CTRL_B0
6
CTRL_B1
7
GND1
8
B_RX+
9
B_RX−
10
A_TX+
11
A_TX−
12
VCC2
13
CTRL_A0
14
CTRL_A1
15
GND2
16
TX1−
TX1+
TX2−
T2X+
RX2−
RX2+
Control Vcc, GND, Float, or 68KR
Control Vcc, GND, Float, or 68KR
Control Vcc, GND, Float, or 68KR
Control Vcc, GND, Float, or 68KR
TX1−
TX1+
RX1−
RX1+
TX2−
TX2+
RX2−
RX2+
VCC
RX1−
RX1+
NB7NPQ7021M
www.onsemi.com
9
PACKAGE DIMENSIONS
UQFN16 3x3, 0.5P
CASE 523AF
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
D
E
B
C0.10
PIN ONE
2X
REFERENCE
2X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
L
D2
E2
C
C0.10
C0.05
C0.05
A1
SEATING
PLANE
e
16X
NOTE 3
b
16X
0.10 C
0.05 C
A
BB
DIM MIN MAX
MILLIMETERS
A 0.45 0.55
A1 0.00 0.05
b 0.20 0.30
D 3.00 BSC
D2 1.60 1.80
E 3.00 BSC
E2 1.60 1.80
e 0.50 BSC
K 0.20 −−
L 0.30 0.50
5
9
1
13
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
2X
0.50
PITCH
1.55
3.30
1
K
DIMENSIONS: MILLIMETERS
0.29
16X
NOTE 4
e/2
2X
0.60
16X
DETAIL A
A3 0.127 REF
17X
A3
A
DETAIL B
DETAIL B
OPTIONAL CONSTRUCTION
L
4X SCALE
DETAIL A
OPTIONAL CONSTRUCTION
2X SCALE
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NB7NPQ7021MMUTXG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
USB Interface IC DUAL CHN USB 3.0/3.1 LINEAR REDRIVER
Lifecycle:
New from this manufacturer.
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