74LV574_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 14 May 2009 7 of 17
NXP Semiconductors
74LV574
Octal D-type flip-flop; positive edge-trigger; 3-state
[1] Typical values are measured at T
amb
=25°C.
[2] t
pd
is the same as t
PLH
and t
PHL
.
[3] Typical value measured at V
CC
= 3.3 V.
[4] t
en
is the same as t
PZH
and t
PZL
.
[5] t
dis
is the same as t
PHZ
and t
PLZ
.
[6] C
PD
is used to determine the dynamic power dissipation (P
D
in µW).
P
D
=C
PD
× V
CC
2
× f
i
× N+∑(C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
∑(C
L
× V
CC
2
× f
o
) = sum of outputs.
t
dis
disable time OE to Qn; Figure 8
[5]
V
CC
= 1.2 V - 75 - - - ns
V
CC
= 2.0 V - 27 27 - 34 ns
V
CC
= 2.7 V - 21 21 - 26 ns
V
CC
= 3.0 V to 3.6 V
[3]
- 16 17 - 21 ns
V
CC
= 4.5 V to 5.5 V
[3]
- - 15 - 18 ns
t
W
pulse width CP, HIGH or LOW; see Figure 7
V
CC
= 2.0 V 34 9 - 41 - ns
V
CC
= 2.7 V 25 6 - 30 - ns
V
CC
= 3.0 V to 3.6 V
[3]
20 5 - 24 - ns
t
su
set-up time Dn to CP; see Figure 9
V
CC
= 1.2 V - 10 - - - ns
V
CC
= 2.0 V 22 4 - 26 - ns
V
CC
= 2.7 V 16 3 - 19 - ns
V
CC
= 3.0 V to 3.6 V
[3]
13 2 - 15 - ns
t
h
hold time Dn to CP; see Figure 9
V
CC
= 1.2 V - −10 - - - ns
V
CC
= 2.0 V 5 −4- 5 -ns
V
CC
= 2.7 V 5 −3- 5 -ns
V
CC
= 3.0 V to 3.6 V
[3]
5 −2- 5 -ns
f
max
maximum
frequency
see Figure 7
V
CC
= 2.0 V 15 40 - 12 - MHz
V
CC
= 2.7 V 19 58 - 16 - MHz
V
CC
= 3.0 V to 3.6 V
[3]
24 70 - 20 - MHz
C
PD
power dissipation
capacitance
C
L
= 50 pF; f
i
= 1 MHz;
V
I
= GND to V
CC
[6]
25 pF
Table 7. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 10.
Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ
[1]
Max Min Max
