Document Number: 002-13915 Rev. *C Page 7 of 21
S70GL02GT
3. Block Diagram
Figure 1. Block Diagram for 2 x GL01GT (Highest Address Sector Protected)
A26 AMAX+1 Ext VCC VCC
A0 to A25 A0-A25 VCCQ VIO
VSS VSS
CE#
CE#
1 Gb Flash
VSSQ
(Flash 1)
OE# OE#
WE# WE# AMAX+1 Int
RESET# RESET#
DQ0-15 DQ0-15
WP#
RY/BY# RY/BY#
Amax+1 Ext VCC
A0-A25 VCCQ
VSS
CE# VSSQ
OE#
WE# AMAX+1 Int
RESET#
DQ0-14, DQ15/A-1
WP#
RY/BY#
1 Gb Flash
(Flash 2)
BYTE#
BYTE#
BYTE#
WP#
Document Number: 002-13915 Rev. *C Page 8 of 21
S70GL02GT
3.1 Special Handling Instructions for BGA Package
Special handling is required for flash memory products in BGA packages.
Flash memory devices in BGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data
integrity may be compromised if the package body is exposed to temperatures above 150 °C for prolonged periods of time.
Figure 2. 64-ball Fortified Ball Grid Array
Notes
1. Ball E1, Do Not Use (DNU), a device internal signal is connected to the package connector. The connector may be used by Cypress for test or other purposes and is
not intended for connection to any host system signal. Do not use these connections for PCB Signal routing channels. Though not recommended, the ball can be
connected to V
CC
or V
SS
through a series resistor.
2. Balls C1, D1, E1, G1: Reserved for Future Use (RFU).
3. Balls A1, A8, H1, H8: No Connect (NC).
A2 C2 D2 E2 F2 G2 H2
A3 C3 D3 E3 F3 G3 H3
A4 C4 D4 E4 F4 G4 H4
A5 C5 D5 E5 F5 G5 H5
A6 C6 D6 E6 F6 G6 H6
A7 C7 D7 E7 F7 G7 H7
DQ15 / A-1
V
SS
BYTE#
A16A15A14A12A13
DQ13 DQ6DQ14DQ7A11A10A8A9
V
CC
DQ4DQ12DQ5A19A21RESET#WE#
DQ11 DQ3DQ10DQ2A20A18WP# RY/BY#
DQ9 DQ1DQ8DQ0A5A6A17A7
OE#
V
SS
CE#A0A1A2A4A3
A1 C1 D1 E1 F1 G1 H1
RFU NCV
IO
RFURFURFUA26NC
A8 C8
B2
B3
B4
B5
B6
B7
B1
B8 D8 E8 F8 G8 H8
A25
NC
A24V
SS
V
IO
A23A22NC
Top View, Balls Facing Down
Document Number: 002-13915 Rev. *C Page 9 of 21
S70GL02GT
3.2 LSH064 — 64 ball Fortified Ball Grid Array, 13 x 11 mm
Figure 3. LSH064—64-ball Fortified Ball Grid Array (FBGA), 13 x 11 mm
N IS THE NUMBER OF POPULATED SOLDER BALL POSITIONS FOR MATRIX
WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW,
WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW,
DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW.
"SD" AND "SE" ARE MEASURED WITH RESPECT TO DATUMS A AND B AND
SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE "E" DIRECTION.
SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D" DIRECTION.
"e" REPRESENTS THE SOLDER BALL GRID PITCH.
DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A
SOLDER BALL POSITION DESIGNATION PER JEP95, SECTION 3, SPP-020.
"+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED SOLDER
A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK
8.
7.
6.
NOTES:
5.
4.
3.
2.
1. ALL DIMENSIONS ARE IN MILLIMETERS.
SD
b
eE
eD
ME
N
0.50
0.50 BSC
1.00 BSC
1.00 BSC
0.60
64
8
0.70
DIMENSIONS
D1
MD
E1
E
D
A
A1
SYMBOL
0.40
MIN.
-
7.00 BSC
7.00 BSC
8
11.00 BSC
13.00 BSC
NOM.
-
1.40
-
MAX.
SE
0.50 BSC
-
METALIZED MARK, INDENTATION OR OTHER MEANS.
"SD" = eD/2 AND "SE" = eE/2.
PLANE PARALLEL TO DATUM C.
"SD" OR "SE" = 0.
SIZE MD X ME.
BALLS.
DETAIL A
002-13243 **

S70GL02GT12FHIV10

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
NOR Flash Nor
Lifecycle:
New from this manufacturer.
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