CM1235-08DE Datasheet CM1235-08DE | P1-P3

January, 2014 − Rev. 5

1 Publication Order Number:

CM1235/D

CM1235

Small Footprint ESD Clamp

Array for High Speed Data

Line Protection

Product Description

The CM1235 is ideal for protecting systems with high data and

clock rates or for circuits requiring low capacitive loading and tightly

controlled signal skews (with channel−to−channel matching at 2%

max deviation).

The device is particularly well−suited for protecting systems using

high−speed ports such as DisplayPort or HDMI, along with

corresponding ports in removable storage, digital camcorders,

DVD−RW drives and other applications where extremely low loading

capacitance with ESD protection are required.

The CM1235 also features easily routed “pass−through” pinouts in a

RoHS compliant (lead−free), 4.0 mm x 1.7 mm, 16−lead WDFN,

small footprint package.

Features

• ESD Protection for 4 Pairs of Differential Channels

• ESD Protection to:

• IEC61000−4−2 Level 4 (ESD) at ±8 kV Contact Discharge

• IEC61000−4−4 (EFT) 40 A (5/50 ns)

• IEC61000−4−5 (Lighting) 3.5 A (8/20 ms)

• Pass−through Impedance Matched Clamp Architecture

• Flow−through Routing for High−speed Signal Integrity

• Minimal Line Capacitance Change with Temperature and Voltage

• 100 W Matched Impedance for Each Paired Differential Channel

• Each I/O Pin can Withstand Over 1000 ESD Strikes*

• RoHS Compliant (lead−free), Small Footprint 4.0 mm x 1.7 mm

WDFN−16 Package

Applications

• DVI, DisplayPort, and HDMI Ports in Notebooks, Set Top Boxes,

Digital TVs, and LCD Displays

• General Purpose High−speed Data Line ESD Protection

*Standard test condition is IEC61000−4−2 level 4 test circuit with each pin

subjected to ±8 kV contact discharge for 1000 pulses. Discharges are timed at

1 second intervals and all 1000 strikes are completed in one continuous test run.

The part is then subjected to standard production test to verify that all of the

tested parameters are within spec after the 1000 strikes.

http://onsemi.com

See detailed ordering and shipping information in the package

dimensions section on page 8 of this data sheet.

ORDERING INFORMATION

WDFN16

DE SUFFIX

CASE 511BG

(Bottom View)

PINOUT DIAGRAM

In_1+

In_1−

In_2+

In_2−

In_3+

In_3−

In_4+

In_4−

GND

Out_1+

Out_1−

Out_2+

Out_2−

Out_3+

Out_3−

Out_4+

Out_4−

CM1235

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Figure 1. Block Diagram

ESD Protection Architecture

Conceptually, an ESD protection device performs the

following actions upon an ESD strike discharge into a

protected ASIC (see Figure 2):

1. When an ESD potential is applied to the system

under test (contact or air−discharge), Kirchoff’s

Current Law (KCL) dictates that the Electrical

Overstress (EOS) currents will immediately divide

throughout the circuit, based on the dynamic

impedance of each path.

2. Ideally, the classic shunt ESD clamp will switch

within 1 ns to a low−impedance path and return

the majority of the EOS current to the chassis

shield/reference ground. In actuality, if the ESD

component’s response time (t

CLAMP

) is slower

than the ASIC it is protecting, or if the Dynamic

Clamping Resistance (R

DYN

) is not significantly

lower than the ASIC’s I/O cell circuitry, then the

ASIC will have to absorb a large amount of the

EOS energy, and be more likely to fail.

3. Subsequent to the ESD/EOS event, both devices

must immediately return to their original

specifications, and be ready for an additional

strike. Any deterioration in parasitics or clamping

capability should be considered a failure, since it

can then affect signal integrity or subsequent

protection capability. (This is known as

“multi−strike” capability.)

The signal line leading the connector to the ASIC routes

through the CM1235 chip which provides 100 W matched

differential channel characteristic impedance that helps

optimize 100 W load impedance applications such as the

HDMI high speed data lines.

NOTE: When each of the channels are used individually

for single−ended signal lines protection, the

individual channel provides 50 W characteristic

impedance matching.

The load impedance matching feature of the CM1235

helps to simplify system designer’s PCB layout

considerations in impedance matching and also eliminates

associated passive components.

The route through the architecture enables the CM1235 to

provide matched impedance for the signal path between the

connector and the ASIC. Besides this function, this circuit

arrangement also changes the way the parasitic inductance

interacts with the ESD protection circuit and helps reduce

the I

RESIDUAL

current to the ASIC.

Figure 2. Standard ESD Protection Device Block

Diagram

CM1235

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The Architecture Advantages

Figure 3 illustrates a standard ESD protection device. The

inductor element represents the parasitic inductance arising

from the bond wire and the PCB trace leading to the ESD

protection diodes.

Figure 3. Standard ESD Protection Model

Figure 4 illustrates a standard ESD protection device. The

inductor element represents the parasitic inductance arising

from the bond wire and the PCB trace leading to the ESD

protection diodes.

Figure 4. CM1234 ESD Protection Model

CM1235 Inductor Elements

In the CM1235 architecture, the inductor elements and

ESD protection diodes interact differently compared to the

standard ESD model.

In the standard ESD protection device model, the

inductive element presents high impedance against high

slew rate strike voltage, i.e. during an ESD strike. The

impedance increases the resistance of the conduction path

leading to the ESD protection element. This limits the speed

that the ESD pulse can discharge through the ESD protection

element.

In the architecture, the inductive elements are in series to

the conduction path leading to the protected device. The

elements actually help to limit the current and voltage

striking the protected device.

First the reactance of the inductive element, L1, on the

connector side when an ESD strike occurs, acts in the

opposite direction of the ESD striking current. This helps

limit the peak striking voltage. Then the reactance of the

inductive element, L2, on the ASIC side forces this limited

ESD strike current to be shunted through the ESD protection

diodes. At the same time, the voltage drop across both series

element acts to lower the clamping voltage at the protected

device terminal.

Through this arrangement, the inductive elements also

tune the impedance of the ESD protection element by

cancelling the capacitive load presented by the ESD diodes

to the signal line. This improves the signal integrity and

makes the overall ESD protection device more transparent

to the high bandwidth data signals passing through the

channel.

The innovative architecture turns the disadvantages of the

parasitic inductive elements into useful components that

help to limit the ESD current strike to the protected device

and also improves the signal integrity of the system by

balancing the capacitive loading effects of the ESD diodes.

At the same time, this architecture provides an impedance

matched signal path for 50 W loading applications.

Board designs can take advantage of precision internal

component matching for improved signal integrity, which is

not otherwise possible with discrete components at the

system level. This helps to simplify the PCB layout

considerations by the system designer and eliminates the

associated passive components for load matching that is

normally required with standard ESD protection circuits.

Each ESD channel consists of a pair of diodes in series that

steer the positive or negative ESD current pulse to either the

Zener diode or to ground. This embedded Zener diode also

serves to eliminate the need for a separate bypass capacitor

to absorb positive ESD strikes to ground. The CM1235

protects against ESD pulses up to ±8 kV contact per the IEC

61000−4−2 standard.

P1-P3 P4-P6 P7-P9

CM1235-08DE

Mfr. #:

Buy CM1235-08DE

Manufacturer:

ON Semiconductor

Description:

TVS Diodes / ESD Suppressors 4 CH ESD 8kV

Lifecycle:

New from this manufacturer.

Delivery:

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CM1235-08DE