7
FN8222.3
July 20, 2009
Instructions and Programming
The INC, U/D and CS inputs control the movement of the
wiper along the resistor array. With CS
set LOW, the device is
selected and enabled to respond to the U/D
and INC inputs.
HIGH to LOW transitions on INC
will increment or decrement
(depending on the state of the U/D
input) a 7-bit counter. The
output of this counter is decoded to select one of one-hundred
wiper positions along the resistive array.
The value of the counter is stored in non-volatile memory
whenever CS
transitions HIGH while the INC input is also
HIGH.
The system may select the X9Cxxx, move the wiper and
deselect the device without having to store the latest wiper
position in non-volatile memory. After the wiper movement is
performed as previously described and once the new
position is reached, the system must keep INC
LOW while
taking CS
HIGH. The new wiper position will be maintained
until changed by the system or until a power-down/up cycle
recalled the previously stored data.
This procedure allows the system to always power-up to a
pre-set value stored in non-volatile memory; then during
system operation, minor adjustments could be made. The
adjustments might be based on user preference, i.e.: system
parameter changes due to temperature drift, etc.
The state of U/D
may be changed while CS remains LOW.
This allows the host system to enable the device and then
move the wiper up and down until the proper trim is attained.
Symbol Table
Performance Characteristics
Contact the factory for more information.
Applications Information
Electronic digitally controlled (XCDP) potentiometers provide
three powerful application advantages:
1. The variability and reliability of a solid-state
potentiometer.
2. The flexibility of computer-based digital controls.
3. The retentivity of non-volatile memory used for the
storage of multiple potentiometer settings or data.
Mode Selection
CS INC U/D MODE
L H Wiper Up
L L Wiper Down
H X Store Wiper Position
H X X Standby Current
L X No Store, Return to Standby
L H Wiper Up (not recommended)
L L Wiper Down (not recommended)
WAVEFORM INPUTS OUTPUTS
Must be
steady
Will be
steady
May change
from Low to
High
Will change
from Low to
High
May change
from High to
Low
Will change
from High to
Low
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A Center Line
is High
Impedance
X9C102, X9C103, X9C104, X9C503
8
FN8222.3
July 20, 2009
Basic Configurations of Electronic Potentiometers
Basic Circuits
V
R
V
R
I
THREE TERMINAL POTENTIOMETER;
VARIABLE VOLTAGE DIVIDER
TWO TERMINAL VARIABLE RESISTOR;
VARIABLE CURRENT
V
H
/R
H
V
L
/R
L
V
W
/R
W
CASCADING TECHNIQUESBUFFERED REFERENCE VOLTAGE
+
+5V
R
1
+V
-5V
V
W
V
REF
V
OUT
OP-07
V
W
/R
W
V
W
/R
W
+V
+V +V
X
(a) (b)
V
OUT
= V
W
/R
W
NONINVERTING AMPLIFIER
V
O
= (1+R
2
/R
1
)V
S
VOLTAGE REGULATOR
R
1
R
2
I
adj
V
O
(REG) = 1.25V (1+R
2
/R
1
)+I
adj
R
2
V
O
(REG)V
IN
317
OFFSET VOLTAGE ADJUSTMENT
+
V
S
V
O
R
2
R
1
100kΩ
10kΩ10kΩ
10kΩ
-12V+12V
TL072
COMPARATOR WITH HYSTERESIS
V
UL
= {R
1
/(R
1
+ R
2
)} V
O
(MAX)
V
LL
= {R
1
/(R
1
+ R
2
)} V
O
(MIN)
+
V
S
V
O
R
2
R
1
LM308A
+5V
-5V
+
V
S
V
O
R
2
R
1
}
}
LT311A
(FOR ADDITIONAL CIRCUITS SEE AN1145)
X9C102, X9C103, X9C104, X9C503
9
FN8222.3
July 20, 2009
X9C102, X9C103, X9C104, X9C503
Small Outline Package Family (SO)
GAUGE
PLANE
A2
A1
L
L1
DETAIL X
4° ±4°
SEATING
PLANE
e
H
b
C
0.010 BM CA
0.004 C
0.010 BM CA
B
D
(N/2)
1
E1
E
NN
(N/2)+1
A
PIN #1
I.D. MARK
h X 45°
A
SEE DETAIL “X”
c
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
SYMBOL
INCHES
TOLERANCE NOTESSO-8 SO-14
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -
A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 -
A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -
b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -
c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 -
D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3
E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -
E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3
e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic -
L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -
L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -
h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -
N 8 14 16 16 20 24 28 Reference -
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994

X9C503SIZT1

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs 50K EEPOTTM POT CMOS 8LD IND
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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