PCA9541A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 24 April 2014 15 of 45
NXP Semiconductors
PCA9541A
2-to-1 I
2
C-bus master selector with interrupt logic and reset
7.4 Interrupt Status registers
The PCA9541A provides 4 different types of interrupt:
• To indicate to the former I
2
C-bus master that it is not in control of the bus anymore
• To indicate to the new I
2
C-bus master that:
– The bus recovery/initialization has been performed and that the downstream
channel connection has been done (built-in bus recovery/initialization active).
– A ‘bus not well initialized’ condition has been detected by the PCA9541A when the
switch has been done (built-in bus recovery/initialization not active). This
information can be used by the new master to initiate its own bus
recovery/initialization sequence.
• Indicate to both I
2
C-bus upstream masters that a downstream interrupt has been
generated through the INT_IN
pin.
• Functionality wiring test.
7.4.1 Bus control lost interrupt
When an upstream master takes control of the I
2
C-bus while the other channel was using
the downstream channel, an interrupt is generated to the master losing control of the bus
(INT
line goes LOW to let the master know that it lost the control of the bus) immediately
after disconnection from the downstream channel.
By setting the BUSLOSTMSK bit to ‘1’, the interrupt is masked and the upstream master
that lost the I
2
C-bus control does not receive an interrupt (INT line does not go LOW).
7.4.2 Recovery/initialization interrupt
Before switching to a new upstream channel, an automatic bus recovery/initialization can
be performed by the PCA9541A. This function is requested by setting the BUSINIT bit to
‘1’. When the downstream bus has been initialized, an interrupt to the new master is
generated (INT
line goes LOW).
By setting the BUSINITMSK bit to ‘1’, the interrupt is masked and the new master does
not receive an interrupt (INT
line does not go LOW).
When the automatic bus recovery/initialization is not requested, if the built-in bus sensor
function (sensing permanently the downstream I
2
C-bus traffic) detects a non-idle
condition (previous bus channel connected to the downstream slave channel, was
between a START and STOP condition), then an interrupt to the new master is sent (INT
line goes LOW). This interrupt tells the new master that an external bus
recovery/initialization must be performed. By setting the BUSOKMSK bit to ‘1’, the
interrupt is masked and the new master does not receive an interrupt (INT
line does not
go LOW).
Remark: In this particular situation, after the switch to the new master is performed,
a read of the Interrupt Status Register is not possible if the switch happened in the
middle of a read sequence because the new master does not have control of the SDA
line.
