ICS851S201CKI REVISION A SEPTEMBER 6, 2013 10 ©2013 Integrated Device Technology, Inc.
ICS851S201I Data Sheet 2:1 DIFFERENTIAL-TO-HCSL MULTIPLEXER
Recommended Termination
Figure 4A is the recommended source termination for applications
where the driver and receiver will be on a separate PCBs. This
termination is the standard for PCI Express™ and HCSL output types.
All traces should be 50Ω impedance single-ended or 100Ω
differential.
Figure 4A. Recommended Source Termination (where the driver and receiver will be on separate PCBs)
Figure 4B is the recommended termination for applications where a
point-to-point connection can be used. A point-to-point connection
contains both the driver and the receiver on the same PCB. With a
matched termination at the receiver, transmission-line reflections will
be minimized. In addition, a series resistor (Rs) at the driver offers
flexibility and can help dampen unwanted reflections. The optional
resistor can range from 0Ω to 33Ω. All traces should be 50Ω
impedance single-ended or 100Ω differential.
Figure 4B. Recommended Termination (where a point-to-point connection can be used)
ICS851S201CKI REVISION A SEPTEMBER 6, 2013 11 ©2013 Integrated Device Technology, Inc.
ICS851S201I Data Sheet 2:1 DIFFERENTIAL-TO-HCSL MULTIPLEXER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS851S201I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS851S201I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
The maximum current at 85°C is as follows:
I
DD_MAX
= 37mA
Power (core)
MAX
=V
DD_MAX
*I
DD
= 3.465V * 44mA = 152.46mW
Power (HCSL)
MAX
= 2 * 44.5mW = 89mW
Total Power_
MAX
= 152.46mW + 89mW = 241.46mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + T
A
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA
must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 74.7°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.242W * 74.7°C/W = 103°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
JA
for 16 Lead VFQFN, Forced Convection
JA
vs. Air Flow
Meters per Second 0 1 2.5
Multi-Layer PCB, JEDEC Standard Test Boards 74.7°C/W 65.3°C/W 58.5°C/W
ICS851S201CKI REVISION A SEPTEMBER 6, 2013 12 ©2013 Integrated Device Technology, Inc.
ICS851S201I Data Sheet 2:1 DIFFERENTIAL-TO-HCSL MULTIPLEXER
3. Calculations and Equations.
The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.
HCSL output driver circuit and termination are shown in Figure 6.
Figure 6. HCSL Driver Circuit and Termination
HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power dissipation,
use the following equations which assume a 50 load to ground.
The highest power dissipation occurs when V
DD
_
MAX
.
Power = (V
DD_MAX
–V
OUT
)*I
OUT
since V
OUT
=I
OUT
*R
L
Power = (V
DD_MAX
–I
OUT
*R
L
)*I
OUT
= (3.465V – 17mA * 50) * 17mA
Total Power Dissipation per output pair = 44.5mW
VDD
V
OUT
R
L
50
IC
I
OUT
= 17mA
R
REF
=
475 ±1%

851S201CKILF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 2 to 1 Diff-to-HCSL Multi w/Low Alarm
Lifecycle:
New from this manufacturer.
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