37
LTC2400
TYPICAL APPLICATIONS
U
pick-
up from the strain bearing member is largely 60Hz,
the LTC2400 will reject it. If serious high frequency noise
is present on the strain bearing member, it may be
necessary to add buffering in order to allow the use of
noise suppression.
Stable Relaxation Oscillator
for External Clock
Applications that require that the notch produced by the
LTC2400’s sinc
4
filter be placed at some frequency other
than 50Hz or 60Hz require an external clock. The fre-
quency required is 2560× the required notch frequency.
Simple relaxation oscillators built from logic gates with
hysteresis such as the 74HC14 are not stable with tem-
perature, supply voltage changes, or from device to
device.
If for example, a remote weigh scale application requires
rejection of a resonance at 11Hz, the frequency must be set
to 28.16kHz. In many instances, these frequencies could
be produced digitally with a phase lock loop or with digital
HC04
C1
C1 MAY VARY FROM 30pF TO 4000pF
STABLE OPERATION AT HIGHER FREQUENCIES
REQUIRES VALUES OF RESISTOR TO BE REDUCED
2400 F40
R1
100k
DCBA
R3
47k
C3
15pF
f
OUT
(kHz) =
R2
47k
C2
15pF
9.5 • 10
–6
C1 (pF)
Figure 41. Stable Relaxation Low Power Oscillator for Notch Tuning
dividers, but they are too low to be produced directly by a
quartz oscillator. Quartz stability is generally not required,
as the notches are wide enough that an oscillator with
0.1% to 1% stability is adequate.
In instances where digital generation of these frequencies
is not practical due to power, space or cost limitations, and
notches in the range of 4Hz to 120Hz are required, the
circuit in Figure 41 can be used.
The frequency can be varied over this range by changing
capacitor C1 over the range of 4000pf to 30pF. For the
resistor values shown, the output frequency in kHz is
approximately 9.5e-6 divided by C1 (C1 in pF). The circuit
produces a controlled amount of hysteresis dependent
only on resistor matching and self biases itself around the
input threshold. All gates must be in the same package,
and no loads should be driven from the outputs driving
feedback paths. If there are spare gates, they can be used
in parallel with gates B and D for improved drive of
feedback paths.
