NB100LVEP91
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8
Application Information
All NB100LVEP91 inputs can accept LVPECL, LVTTL,
LVCMOS, HSTL, CML, or LVDS signal levels. The
limitations for differential input signal (LVDS, HSTL,
LVPECL, or CML) are the minimum input swing of 150 mV
and the maximum input swing of 3.0 V. Within these
conditions, the input voltage can range from V
CC
to GND.
Examples interfaces are illustrated below in a 50 W
environment (Z = 50 W)
V
EE
GND GND V
EE
Z
Z
V
CC
V
CC
GND
LVPECL
Driver
LVEP91
50 W
V
TT
= V
CC
− 2.0 V
50 W
D
D
V
CC
V
CC
LVDS
Driver
LVEP91
Z
Z
D
D
100 W
Figure 6. Standard LVPECL Interface
Z
Z
V
CC
V
CC
HSTL
Driver
LVEP91
50 W 50 W
D
D
GND
Z
Z
V
CC
V
CC
CML
Driver
LVEP91
50 W
V
CC
50 W
D
D
Figure 7. Standard LVDS Interface
Figure 8. Standard HSTL Interface
Figure 9. Standard 50 W Load CML Interface
GND V
EE
GND GND V
EE
GND GND
V
EE
GND V
EE
GND GND
Z
V
CC
V
CC
LVTTL
Driver
LVEP91
D
D
1.5 V
Figure 10. Standard LVTTL Interface
Z
V
CC
V
CC
LVCMOS
Driver
LVEP91
D
D
Open
Figure 11. Standard LVCMOS Interface
(D
Will Default to V
CC
/2 When Left Open.
A Reference Voltage of V
CC
/2 Should be Applied
to D Input, if D
is Interfaced to CMOS Signals.)
GND
(externally generated
reference voltage)