10
Figure 17. Propagation delay test circuit and waveforms.
Figure 18. CMR test circuit and waveforms.
0.1 µF
V
CC
= 15
to 30 V
47
1
3
I
F
= 7 to 16 mA
V
O
+
+
2
4
8
6
7
5
10 KHz
50% DUTY
CYCLE
500
3 nF
I
F
V
OUT
t
PHL
t
PLH
t
f
t
r
10%
50%
90%
0.1 µF
V
CC
= 30 V
1
3
I
F
V
O
+
+
2
4
8
6
7
5
A
+
B
V
CM
= 1500 V
5 V
V
CM
t
0 V
V
O
SWITCH AT B: I
F
= 0 mA
V
O
SWITCH AT A: I
F
= 10 mA
V
OL
V
OH
t
V
CM
δV
δt
=
11
+ HVDC
3-PHASE
AC
- HVDC
0.1 µF
V
CC
= 15 V
1
3
+
2
4
8
6
7
5
HCPL-3140/HCPL-0314
Rg
Q1
Q2
270
+5 V
CONTROL
INPUT
74XXX
OPEN
COLLECTOR
Applications Information
Eliminating Negative IGBT Gate
Drive
To keep the IGBT firmly off,
the HCPL-3140/HCPL-0314 has a
very low maximum V
OL
specification of 1.0 V. Minimizing
Rg and the lead inductance from
the HCPL-3140/HCPL-0314 to
the IGBT gate and emitter
(possibly by mounting the
HCPL-3140/HCPL-0314 on a
small PC board directly above the
IGBT) can eliminate the need for
negative IGBT gate drive in many
applications as shown in
Figure 19. Care should be taken
with such a PC board design to
avoid routing the IGBT collector
or emitter traces close to the
HCPL-3140/HCPL-0314 input as
this can result in unwanted
coupling of transient signals into
the input of HCPL-3140/
HCPL-0314 and degrade
performance. (If the IGBT
drain must be routed near the
HCPL-3140/HCPL-0314 input,
then the LED should be reverse
biased when in the off state, to
prevent the transient signals
coupled from the IGBT drain
from turning on the HCPL-3140/
HCPL-0314.)
Figure 19. Recommended LED drive and application circuit for HCPL-3140/HCPL-0314.
12
Selecting the Gate Resistor (Rg)
Step 1: Calculate R
g
minimum from the I
OL
peak specification. The IGBT
and Rg in Figure 19 can be analyzed as a simple RC circuit with a
voltage supplied by the HCPL-3140/HCPL-0314.
The V
OL
value of 5 V in the previous equation is the V
OL
at the peak
current of 0.6A. (See Figure 6).
Step 2: Check the HCPL-3140/HCPL-0314 power dissipation and
increase Rg if necessary. The HCPL-3140/HCPL-0314 total power
dissipation (P
T
) is equal to the sum of the emitter power (P
E
) and the
output power (P
O
).
P
T
= P
E
+ P
O
P
E
= I
F
V
F
Duty Cycle
P
O
= P
O(BIAS)
+ P
O(SWITCHING)
= I
CC
V
CC
+ E
SW
(Rg,Qg)
f
= (I
CCBIAS
+ K
ICC
Qg
f)
V
CC
+ E
SW
(Rg,Qg)
f
where K
ICC
Qg
f is the increase in I
CC
due to switching and K
ICC
is a
constant of 0.001 mA/(nC*kHz). For the circuit in Figure 19 with I
F
(worst case) = 10 mA, Rg = 32 , Max Duty Cycle = 80%,
Qg = 100 nC, f = 20 kHz and T
AMAX
= 85°C:
P
E
= 10 mA
1.8 V
0.8 = 14 mW
P
O
= (3 mA + (0.001 mA/(nC
kHz))
20 kHz
100 nC)
24 V +
0.4
µ
J
20 kHz = 128 mW
< 250 mW (P
O(MAX)
@ 85°C)
The value of 3 mA for I
CC
in the previous equation is the max. I
CC
over
entire operating temperature range.
Since P
O
for this case is less than P
O(MAX)
, Rg = 32 is alright for the
power dissipation.
=
24 V – 5 V
0.6A
= 32
Figure 20. Energy dissipated in the
HCPL-0314 and for each IGBT switching
cycle.
LED Drive Circuit Considerations for
Ultra High CMR Performance
Without a detector shield, the
dominant cause of optocoupler
CMR failure is capacitive
coupling from the input side of
the optocoupler, through the
package, to the detector IC
as shown in Figure 21. The
HCPL-3140/HCPL-0314 improves
CMR performance by using a
detector IC with an optically
transparent Faraday shield, which
diverts the capacitively coupled
current away from the sensitive
IC circuitry. However, this shield
does not eliminate the capacitive
coupling between the LED and
opto-coupler pins 5-8 as shown in
Figure 22. This capacitive
coupling causes perturbations in
the LED current during common
mode transients and becomes the
major source of CMR failures for
a shielded optocoupler. The main
design objective of a high CMR
LED drive circuit becomes
keeping the LED in the proper
state (on or off) during common
mode transients. For example,
the recommended application
circuit (Figure 19), can achieve
10 kV/µs CMR while minimizing
component complexity.
Techniques to keep the LED in
the proper state are discussed in
the next two sections.
Rg
V
CC
– V
OL
I
OLPEAK
Esw ENERGY PER SWITCHING CYCLE µJ
0
0
Rg GATE RESISTANCE
100
1.5
20
4.0
40
1.0
60 80
3.5
Qg = 50 nC
Qg = 100 nC
Qg = 200 nC
Qg = 400 nC
3.0
2.0
0.5
2.5

HCPL-3140-000E

Mfr. #:
Manufacturer:
Broadcom / Avago
Description:
High Speed Optocouplers 0.4A IGBT Gate Drive
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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