AD8116
–11–
THEORY OF OPERATION
Loading Data
Data to control the switches is clocked serially into an 80-bit
shift register and then transferred in parallel to an 80-bit latch.
The falling edge of CLK (the serial clock input) loads data into
the shift register. The first five bits of the 80 bits are loaded via
DATA IN (the serial data input) program OUT15. The first of
the five bits (D4) enables or disables the output. The next four
bits (D3–D0, D3 = MSB, D0 = LSB) determine which one of
the 16 inputs will be connected to OUT15 (only one of the 16
inputs can be connected to a given output). The remaining bits
program OUT14 through OUT00.
After the shift register is filled with the new 80 bits of control
data, UPDATE is activated (low) to transfer the data to the
parallel latches. The switch control latches are static and will
hold their data as long as power is applied.
To extend the number of switches in an array, the DATA
OUT and DATA IN pins of multiple AD8116s can be daisy-
chained together. The DATA OUT pin is the end of the shift
register and may be directly connected to the DATA IN pin of
the follow-on AD8116. CE can be used to control the clocking
of data into selected devices.
Serial Logic
The AD8116 employs a serial interface for programming the
state of the crosspoint array. The 80-bit shift register (Figure
consists of static D flip-flops while the parallel latch uses
transparent latches that are latched by a logic high state of
UPDATE, and transparent on logic low of the same signal.
The 4-to-16 decoder is a small current-mode multilevel gate
array that steers a small select current to the selected point in the
crosspoint array.
The RESET signal is connected to only the enable/disable bit on
each output buffer. This means that the AD8116 will have a ran-
dom configuration on power-up. In normal operation though,
RESET and UPDATE can be used together to alternately
enable and disable an entire array at once, if desired.
Separate chip enable (CE), update (UPDATE) and serial data
out (DATA OUT) signals allow several options for program-
ming larger arrays of AD8116s. The function of each bit in the
80-bit word that programs the state of the AD8116 is shown in
Figure 4. In normal operation, the DATA OUT pin of one
AD8116 is connected to the DATA IN of the next. In this way, for
example, an array of eight AD8116s would be programmed with
one 640-bit sequence. In this mode CE is logic low and the
CLK and UPDATE pins are connected in parallel.
In one alternate mode of programming, the CE pin can be used
to select one AD8116 at a time. This might be desirable when
the ability to program just one device at a time is required. In
this mode CLK, UPDATE and DATA IN are all connected in
parallel. The user then selects each AD8116 in turn (with the
CE signal) and programs it with the desired data. Larger arrays
can also be programmed by connecting each DATA IN signal to
a larger parallel bus. In this way only 80 clock cycles would be
needed to program the entire array. The logic signals are con-
figured so that all programming can be accomplished with
synchronous logic and a continuous clock, so that no missing
cycles or delays need be generated.
APPLICATIONS
Multichannel Video
The excellent video specifications of the AD8116 make it an
ideal candidate for creating composite video crosspoint switches.
These can be made quite dense by taking advantage of the
AD8116’s high level of integration and the fact that composite
video requires only one crosspoint channel per system video
channel. There are, however, other video formats that can be
routed with the AD8116 requiring more than one crosspoint
channel per video channel.
Some systems use twisted pair wiring to carry video signals.
These systems utilize differential signals and can lower costs
because they use lower cost cables, connectors and termination
methods. They also have the ability to lower crosstalk and reject
common-mode signals, which can be important for equip-
ment that operates in noisy environments or where common-
mode voltages are present between transmitting and receiving
equipment.
In such systems, the video signals are differential; there is a
positive and negative (or inverted) version of the signals. These
complementary signals are transmitted onto each of the two
wires of the twisted pair, yielding a first order zero common-
mode voltage. At the receive end, the signals are differentially
received and converted back into a single-ended signal.
When switching these differential signals, two channels are
required in the switching element to handle the two differential
signals that make up the video channel. Thus, one differential
video channel is assigned to a pair of crosspoint channels, both
input and output. For a single AD8116, eight differential video
channels can be assigned to the 16 inputs and 16 outputs. This
will effectively form an 8 × 8 differential crosspoint switch.
Programming such a device will require that inputs and outputs
be programmed in pairs. This information can be deduced by
inspection of the programming format of the AD8116 and the
requirements of the system.
There are other analog video formats requiring more than one
analog circuit per video channel. One two-circuit format that is
more commonly being used in systems such as satellite TV,
digital cable boxes and higher quality VCRs, is called S-video or
Y/C video. This format carries the brightness (luminance or Y)
portion of the video signal on one channel and the color (chromi-
nance or C) on a second channel.
Since S-video also uses two separate circuits for one video chan-
nel, creating a crosspoint system requires assigning one video
channel to two crosspoint channels as in the case of a differen-
tial video system. Aside from the nature of the video format,
other aspects of these two systems will be the same.
There are yet other video formats using three channels to carry
the video information. Video cameras produce RGB (red, green,
blue) directly from the image sensors. RGB is also the usual
format used by computers internally for graphics. RGB can also
be converted to Y, R-Y, B-Y format, sometimes called YUV
format. These three-circuit video standards are referred to as
component analog video.
The three-circuit video standards require three crosspoint chan-
nels per video channel to handle the switching function. In a
fashion similar to the two-circuit video formats, the inputs and
outputs are assigned in groups of three and the appropriate logic
programming is performed to route the video signals.
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