VNQ830 Application information
Doc ID 7390 Rev 5 19/28
where -I
GND
is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in R
GND
(when V
CC
< 0 during reverse battery situations) is:
P
D
= (-V
CC
)
2
/ R
GND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
R
GND
will produce a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same R
GND
.
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2 Solution 2: a diode (D
GND
) in the ground line
A resistor (R
GND
= 1 kΩ) should be inserted in parallel to D
GND
if the device will be driving
an inductive load. This small signal diode can be safely shared amongst several different
HSD. Also in this case, the presence of the ground network will produce a shift (≈600 mV) in
the input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.2 Load dump protection
D
ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
maximum DC rating. The same applies if the device is subject to transients on the V
CC
line that are greater than those shown in the ISO T/R 7637/1 table.
3.3 MCU I/O protection
If a ground protection network is used and negative transients are present on the V
CC
line,
the control pins will be pulled negative. ST suggests to insert a resistor (R
prot
) in line to
prevent the microcontroller I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit
microcontroller I/Os:
-V
CCpeak
/ I
latchup
≤ R
prot
≤ (V
OHμC
- V
IH
- V
GND
) / I
IHmax
Obsolete Product(s) - Obsolete Product(s)
