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FEATURES
Holds microprocessor in check during power
transients
Halts and restarts an out-of-control
microprocessor
Warns microprocessor of an impending power
failure
Converts CMOS SRAM into nonvolatile
memory
Unconditionally write-protects memory when
power supply is out of tolerance
Delays write protection until completion of
the current memory cycle
Consumes less than 200 nA of battery current
Controls external power switch for high
current applications
Debounces pushbutton reset
Accurate 10% power supply monitoring
Optional 5% power supply monitoring
designated DS1238-5
Provides orderly shutdown in microprocessor
applications
Pin-for-pin compatible with MAX691
Standard 16-pin DIP or space-saving 16-pin
SOIC
Optional industrial temperature range -40°C
to +85°C
PIN ASSIGNMENT
PIN DESCRIPTION
V
BAT
- +3-Volt Battery Input
V
CCO
- Switched SRAM Supply Output
V
CC
- +5-Volt Power Supply Input
GND - Ground
PF - Power-Fail
RVT - Reset Voltage Threshold
OSCIN - Oscillator In
OSCSEL - Oscillator Select
IN - Early Warning Input
NMI - Non-Maskable Interrupt
ST - Strobe Input
CEO - Chip Enable Output
CEI - Chip Enable Input
WDS - Watchdog Status
RST - Reset Output (active low)
RST - Reset Output (active high)
DESCRIPTION
The DS1238 MicroManager provides all the necessary functions for power supply monitoring, reset
control, and memory backup in microprocessor-based systems. A precise internal voltage reference and
comparator circuit monitor power supply status. When an out-of-tolerance condition occurs, the
microprocessor reset and power-fail outputs are forced active, and static RAM control unconditionally
write protects external memory. The DS1238 also provides early warning detection of a user-defined
threshold by driving a non-maskable interrupt. External reset control is provided by a pushbutton reset
DS1238
MicroManage
r
www.dalsemi.com
16-Pin SOIC (300-mil)
See Mech. Drawings Section
VBAT
VCCO
VCC
RST
RST
WDS
1
2
3
16
15
14
GND CEI413
PF
RVT
OSCIN
CEO
ST
NMI
5
6
7
12
11
10
OSCSEL IN89
16-Pin DIP (300-mil)
See Mech. Drawings Section
VBAT
VCCO
VCC
RST
RST
WDS
1
2
3
16
15
14
GND CEI413
PF
RVT
OSCIN
CEO
ST
NMI
5
6
7
12
11
10
OSCSEL IN89
DS1238
2 of 14
debounce circuit connected to the RST pin. An internal watchdog timer can also force the reset outputs to
the active state if the strobe input is not driven low prior to watchdog timeout. Oscillator control pins
OSCSEL and OSCIN provide either external or internal clock timing for both the reset pulse width and
the watchdog timeout period. The Watchdog Status and Reset Voltage Threshold are provided via WDS
and RVT , respectively. A block diagram of the DS1238 is shown in Figure 1.
PIN DESCRIPTION
PIN NAME DESCRIPTION
V
BAT
+3V battery input provides nonvolatile operation of control functions.
V
CCO
V
CC
output for nonvolatile SRAM applications.
V
CC
+5V primary power input.
GND System ground.
PF
Power-fail indicator, active high, used for external power switching as shown in
Figure 9.
RVT
Reset Voltage Threshold. Indicates that V
CC
is below the reset voltage threshold.
OSCIN Oscillator input or timing capacitor. See Table 1.
OSCSEL Oscillator Select. Selects internal or external clock functions. See Table 1.
IN
Early warning power-fail input. This voltage sense point can be tied (via resistor
divider) to a user-selected voltage.
NMI
Non-maskable interrupt. Used in conjunction with the IN pin to indicate an impending
power failure.
ST
Strobe input. A high-to-low transition will reset the watchdog timer, indicating that
software is still in control.
CEO
Chip enable output. Write protected. Used with nonvolatile SRAM applications.
CEI
Chip enable input.
WDS
Watchdog Status. Indicates that a watchdog timeout has occurred.
RST
Active low reset output.
RST Active high reset output.
POWER MONITOR
The DS1238 employs a band gap voltage reference and a precision comparator to monitor the 5-volt
supply (V
CC
) in microprocessor-based systems. When an out-of-tolerance condition occurs, the RVT ,
RST, and RST outputs are driven to the active state. The V
CC
trip point (V
CCTP
) is set for 10% operation
so that the RVT , RST and RST outputs will become active as V
CC
falls below 4.5 volts (4.37 typical).
The V
CCTP
for the 5% operation option (DS1238-5) is set for 4.75 volts (4.62 typical). The RST and RST
signals are excellent for microprocessor reset control, as processing is stopped at the last possible moment
of in-tolerance V
CC
. On power up, RVT will become inactive as soon as V
CC
rises above V
CCTP
. However,
the RST and RST signals remain active for a minimum of 50 ms (100 ms typical) after V
CCTP
is reached
to allow the power supply and microprocessor to stabilize.
DS1238
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DS1238 FUNCTIONAL BLOCK DIAGRAM Figure 1
WATCHDOG TIMER
The DS1238 provides a watchdog timer function which forces the WDS , RST, and RST signals to the
active state when the strobe input (ST ) is not stimulated for a predetermined time period. This time period
is described below in Table 1. The watchdog timeout period begins as soon as RST and RST are inactive.
If a high-to-low transition occurs at the ST input prior to timeout, the watchdog timer is reset and begins
to time out again. The ST input timing is shown in Figure 2. In order to guarantee that the watchdog timer
does not time out, a high-to-low transition on ST must occur at or less than the minimum timeout of the
watchdog as described in the AC Electrical Characteristics. If the watchdog timer is allowed to time out,
the WDS , RST, and RST outputs are driven to the active state. WDS is a latched signal which indicates
the watchdog status, and is activated as soon as the watchdog timer completes a full period as outlined in

DS1238-10+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Supervisory Circuits
Lifecycle:
New from this manufacturer.
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