DS1238
7 of 14
MEMORY BACKUP
The DS1238 provides all of the necessary functions required to battery back a static RAM. First, an
internal switch is provided to supply SRAM power from the primary 5-volt supply (V
CC
) or from an
external battery (V
BAT
), whichever is greater. Second, the same power-fail detection described in the
power monitor section is used to hold the chip enable output (
CEO ) to within 0.3 volts of V
CC
or to within
0.7 volts of V
BAT
. The output voltage diode drop from V
BAT
(0.7 V) is necessary to prevent charging of
the battery in violation of UL standards. Write protection occurs as V
CC
falls below V
CCTP
as specified. If
CEI is low at the time power-fail detection occurs, CEO is held in its present state until CEI is returned
high, or the period t
CE
expires. This delay of write protection until the current memory cycle is completed
prevents the corruption of data. If
CEO is in an inactive state at the time of V
CC
fail detection, CEO will
be unconditionally disabled within t
CF
. During nominal supply conditions CEO will follow CEI with a
maximum propagation delay of 20 ns. Figure 7 shows a typical nonvolatile SRAM application.
FRESHNESS SEAL
In order to conserve battery capacity during storage and/or shipment of an end system, the DS1238
provides an internal freshness seal to electrically disconnect the battery. Figure 8 depicts the three pulses
below ground on the IN pin required to invoke the freshness seal. The freshness seal will result in the tri-
state of outputs V
CCO
, RST, RST , and CEO . The WDS output will be driven active low. The PF pin is not
disabled by the freshness mode and will continue to source power from the V
BAT
pin whenever V
CC
is
below V
BAT
. The freshness seal will be disconnected and normal operation will begin when V
CC
is cycled
and reapplied to a level above V
BAT
.
To prevent negative pulses associated with noise from setting the freshness mode in system applications,
a series diode and resistor can be used to shunt noise to ground. During manufacturing, the freshness seal
can still be set by holding TP2 at -3 volts while applying the 0 to -3-volt clock to TP1.
POWER SWITCHING
When larger operating currents are required in a battery-backed system, the internal switching devices of
the DS1238 may be too small to support the required load through V
CCO
with a reasonable voltage drop.
For these applications, the PF output is provided to gate external power switching devices. As shown in
Figure 9, power to the load is switched from V
CC
to battery on power-down, and from battery to V
CC
on
power-p. The DS1336 is designed to use the PF output to switch between V
BAT
and V
CC
. It provides
better leakage and switchover performance than currently available discrete components. The transition
threshold for PF is set to the external battery voltage V
BAT
, allowing a smooth transition between sources.
Any load applied to the PF pin by an external switch will be supplied by the battery. Therefore, if a
discrete switch is used, this load should be taken into consideration when sizing the battery.
