AD7156
Rev. 0 | Page 3 of 28
SPECIFICATIONS
V
DD
= 1.8 V to 3.6 V, GND = 0 V, temperature range = −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit
1
Test Conditions/Comments
CAPACITIVE INPUT
Conversion Input Range, CIN to EXC
2, 3
3.2 4 pF 4 pF input range
1.6 2 pF 2 pF input range
0.8 1 pF 1 pF input range
0.4 0.5 pF 0.5 pF input range
Resolution
4, 5
2.0 fF 4 pF input range
1.6 fF 2 pF input range
1.4 fF 1 pF input range
1.0 fF 0.5 pF input range
Maximum Allowed Capacitance, CIN to GND
4, 6
50 pF
See Figure 4, Figure 5, and
Figure 6
Minimum Allowed Resistance, CIN to GND
4, 6
10 MΩ See Figure 10 and Figure 11
Maximum Allowed Serial Resistance
4, 6
50 kΩ See Figure 14
Gain Error −20 +20 %
Gain Deviation over Temperature
4
0.5 %FSR See Figure 17
Gain Matching Between Ranges
4
−2 +2 %
Offset Error
4
50 fF CIN and EXC pins disconnected
Offset Deviation over Temperature
4
5 fF
CIN and EXC pins disconnected
See Figure 16
Integral Nonlinearity (INL)
4
0.05 %
Channel-to-Channel Isolation
4
60 dB
Power Supply Rejection
4
4 fF/V
CAPDAC
Full Range 10 12.5 pF
Resolution (LSB)
4
200 fF
Differential Nonlinearity (DNL)
4
0.25 LSB
Auto-DAC Increment/Decrement
4, 7
25 75 % of C
IN
range
EXCITATION
Voltage
4, 7
±V
DD
/2
V
Frequency 16 kHz See Figure 18
Maximum Allowed Capacitance EXC to GND
4, 6
1000 pF
See Figure 7, Figure 8, and
Figure 9
Minimum Allowed Resistance EXC to GND
4, 6
1 MΩ See Figure 12 and Figure 13
LOGIC OUTPUTS (OUT1, OUT2)
Output Low Voltage (V
OL
) 0.4 V I
SINK
= −3 mA
Output High Voltage (V
OH
) V
DD
– 0.6 V I
SOURCE
= +3 mA
SERIAL INTERFACE INPUTS (SCL, SDA)
Input High Voltage (V
IH
) 70 % of V
DD
Input Low Voltage (V
IL
) 25 % of V
DD
Input Leakage Current ±0.1 ±5 µA
Input Pin Capacitance 6 pF
OPEN-DRAIN OUTPUT (SDA)
Output Low Voltage (V
OL
) 0.4 V
I
SINK
= −6.0 mA
Output High Leakage Current (I
OH
) 0.1 5 µA V
OUT
= V
DD
