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AD7156BCPZ-REEL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29
AD7156
Rev. 0 | Page 6 of 28
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter Rating
Positive Supply Voltage V
DD
to GND
−0.3 V to +3.9 V
Voltage on Any Input or Output to GND –0.3 V to V
DD
+ 0.3 V
ESD Rating
ESD Association Human Body Model, S5.1
4 kV
Field-Inducted Charged Device Model
500 V
Operating Temperature Range −40°C to +85°C
Storage Temperature Range –65°C to +150°C
Maximum Junction Temperature 150°C
LFCSP Package
θ
JA
, Thermal Impedance to Air
49°C/W
θ
JC
, Thermal Impedance to Case
3°C/W
Reflow Soldering (Pb-Free)
Peak Temperature 260(0/−5)°C
Time at Peak Temperature 10 sec to 40 sec
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD7156
Rev. 0 | Page 7 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
1
VDD
2
CIN2
3
CIN1
4
EXC2
5
SDA
10
SCL
9
OUT2
8
OUT1
7
EXC1
6
AD7156
TOP VIEW
(Not to Scale)
07726-003
NOTES
1. THE EXPOSED PAD MUST BE CONNECTED TO
GND OR IT MUST BE ISOLATED (FLOATING).
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 GND Ground Pin.
2 VDD
Power Supply Voltage. This pin should be decoupled to GND using a low impedance capacitor, such as a
0.1 F X7R multilayer ceramic capacitor.
3 CIN2
CDC Capacitive Input Channel 2. The measured capacitance (sensor) is connected between the EXC2 pin and
the CIN2 pin. If not used, this pin can be left open circuit or be connected to GND. When a conversion is
performed on Channel 2, the CIN2 pin is internally connected to a high impedance input of the Σ-∆
modulator. When a conversion is performed on the other channel or in idle mode or power-down mode,
the CIN2 pin is internally disconnected and left floating by the part.
4 CIN1
CDC Capacitive Input Channel 1. The measured capacitance (sensor) is connected between the EXC1 pin and
the CIN1 pin. If not used, this pin can be left open circuit or be connected to GND. When a conversion is
performed on Channel 1, the CIN1 pin is internally connected to a high impedance input of the Σ-∆
modulator. When a conversion is performed on the other channel or in idle mode or power-down mode,
the CIN1 pin is internally disconnected and left floating by the part.
5 EXC2
CDC Excitation Output Channel 2. The measured capacitance is connected between the EXC2 pin and the
CIN2 pin. If not used, this pin should be left as an open circuit. When a conversion is performed on Channel 2,
the EXC2 pin is internally connected to the output of the excitation signal driver. When a conversion is per-
formed on the other channel or in idle mode or power-
down mode, the EXC2 pin is internally connected
to GND.
6 EXC1
CDC Excitation Output Channel 1. The measured capacitance is connected between the EXC1 pin and the
CIN1 pin. If not used, this pin should be left as an open circuit. When a conversion is performed on Channel 1,
the EXC1 pin is internally connected to the output of the excitation signal driver. When a conversion is per-
formed on the other channel or in idle mode or power-
down mode, the EXC1 pin is internally connected
to GND.
7 OUT1 Logic Output Channel 1. A high level on this output indicates proximity detected on CIN1.
8 OUT2 Logic Output Channel 2. A high level on this output indicates proximity detected on CIN2.
9 SCL
Serial Interface Clock Input. This pin connects to the master clock line and requires a pull-up resistor if not
provided elsewhere in the system.
10 SDA
Serial Interface Bidirectional Data. This pin connects to the master data line and requires a pull-up resistor if
not provided elsewhere in the system.
AD7156
Rev. 0 | Page 8 of 2
0
0 50 100 150 200 250 300
CAPACITANCE CIN TO GROUND (pF)
TYPICAL PERFORMANCE CHARACTERISTICS
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
OFFSET ERROR (pF)
07726-004
1.8V
3.3V
1
0
–1
–2
–3
–4
0 500 1000 1500 2000
OFFSET ERROR (fF)
CAPACITANCE EXC TO GROUND (pF)
07726-007
1.8V
3.3V
Figure 4. Capacitance Input Offset Error vs. Capacitance CIN to GND,
V
DD
= 1.8 V and 3.3 V, EXC Pin Open Circuit
Figure 7. Capacitance Input Offset Error vs. Capacitance EXC to GND,
V
DD
= 1.8 V and 3.3 V, CIN Pin Open Circuit
5
0
–5
–10
–15
–20
GAIN ERROR (%FSR)
07726-005
8
–25
0 50 100 150 200 250 300
CAPACITANCE CIN TO GROUND (pF)
1.8V
3.3V
0 500 1000 1500 2000
GAIN ERROR (%FSR)
CAPACITANCE EXC TO GROUND (pF)
07726-008
1.8V
3.3V
1
0
–1
–2
–3
–4
1
0
–1
–2
–3
–4
0 500 1000 1500 2000
GAIN ERROR (%FSR)
CAPACITANCE EXC TO GROUND (pF)
07726-009
Figure 5. Capacitance Input Gain Error vs. Capacitance CIN to GND,
V
DD
= 1.8 V and 3.3 V, CIN to EXC = 3 pF
Figure 8. Capacitance Input Gain Error vs. Capacitance EXC to GND,
V
DD
= 1.8 V and 3.3 V, CIN to EXC = 3 pF
5
0
–5
–10
–15
–20
GAIN ERROR (%FSR)
07726-006
–25
0 50 100 150 200 250 300
CAPACITANCE CIN TO GROUND (pF)
1.8V
3.3V
Figure 6. Capacitance Input Gain Error vs. Capacitance CIN to GND,
V
DD
= 1.8 V and 3.3 V, CIN to EXC = 9 pF
1.8V
3.3V
Figure 9. Capacitance Input Gain Error vs. Capacitance EXC to GND,
V
DD
= 1.8 V and 3.3 V, CIN to EXC = 9 pF
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29

AD7156BCPZ-REEL

Mfr. #:
Buy AD7156BCPZ-REEL
Manufacturer:
Analog Devices Inc.
Description:
Data Acquisition ADCs/DACs - Specialized 1.8V 3mm X 3 mm 2-CH Cap Cnvtr
Lifecycle:
New from this manufacturer.
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