L6374 The switching of the output stage
11/19
11 The switching of the output stage
The cross conduction of the two transistors of an output stage of the L6374 would be
significantly noisy, because the transistors here can carry peak currents in excess of
100 mA, and even more in the few nanoseconds before the current limiting circuits are really
effective.
Consequently the device has been designed so as to avoid such cross conduction. At every
switching transition, first of all the transistor in conduction is turned OFF. Then, after a safe
interval of around 200 ns, the other transistor is turned on.
When analyzing the switching cycle, and the associated switching times, it is useful to
identify some subsequent phases:
● delay from the input pin to the output reaction;
● OFF transition in the output stage;
● dead time
● on transition in the output stage.
Figure 6. V
S
= 35 V, 350 Ω connected to V
S
/2.
Figure 6 helps understand such sequence. In fact, with a purely resistive load connected to
V
s
/2 no parasitic elements interfere significantly. The waveform can be significantly less
easy to in terpret if the load has not the perfect symmetry of that case, as showed below.
For instance, it is enough to connect the resistive load to ground, or to V
s
– as Figure 7 and
Figure 8 – show to hide some of the switching phases described.
If the load is connected to ground, the waveform stays stuck to ground as long as the output
stage is in high impedance; viceversa when the load is connected to Vs the waveform will
linger close to the supply voltage as long as possible.
If an output load made of an inductor and a resistor in series is used, the inductive kick at
the beginning of every output transition generates the equivalent effect of an "anticipated"
