Integrated Silicon Solution, Inc. — www.issi.com 1
Rev. A
06/01/2016
Copyright © 2016 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest
version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
IS61WV51232ALL/ALS
IS61WV51232BLL/BLS
IS64WV51232BLL/BLS
512K x 32 HIGH-SPEED ASYNCHRONOUS
CMOS STATIC RAM WITH 3.3V SUPPLY
JUNE 2016
FEATURES
• High-speedaccesstimes:
8, 10, 20 ns
• High-performance,low-powerCMOSprocess
• Multiplecenterpowerandgroundpinsforgreater
noise immunity
• EasymemoryexpansionwithCE and OE options
• CE power-down
• Fullystaticoperation:noclockorrefresh
required
• TTLcompatibleinputsandoutputs
• Singlepowersupply
Vdd 1.65V to 2.2V (IS61WV51232Axx)
speed = 20ns for Vdd 1.65V to 2.2V
Vdd 2.4V to 3.6V (IS61/64WV51232Bxx)
speed = 10ns for Vdd 2.4V to 3.6V
speed = 8ns for Vdd 3.3V + 5%
• Packagesavailable:
–
90-ball miniBGA (8mm x 13mm)
• IndustrialandAutomotiveTemperatureSupport
• Lead-freeavailable
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
TheISSI IS61WV51232Axx/Bxx and IS64WV51232Bxx are
high-speed,16M-bitstaticRAMsorganizedas512Kwords
by 32 bits. It is fabricated using ISSI's high-performance
CMOS technology.This highly reliableprocess coupled
with innovative circuit design techniques, yields high-
performance and low power consumption devices.
When CE is HIGH (deselected), the deviceassumes a
standby mode at which the power dissipation can be re-
duceddownwithCMOSinputlevels.
EasymemoryexpansionisprovidedbyusingChipEnable
andOutputEnableinputs,CE and OE.TheactiveLOW
Write Enable(WE) controls both writing and reading of
the memory.
Thedeviceispackagedinthe JEDECstandard 90-ball
BGA (8mm x 13mm).
A0-A18
CE
OE
WE
512K x 32
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
VSS
VDD
I/O
DATA
CIRCUIT
DQa-d
BWa-d
CE2