LTC3858
10
3858fc
FUNCTIONAL DIAGRAM
SW
25, 16
TOP
BOOST
24, 17
TG
26, 15
C
B
C
IN
D
D
B
CLKOUT
PGND
BOT
BG
23, 18
INTV
CC
INTV
CC
V
IN
C
OUT
V
OUT
3858 FD
R
SENSE
DROP
OUT
DET
BOT
TOP ON
S
R
Q
Q
SHDN
SLEEP
0.425V
ICMP
2.7V
0.55V
IR
3mV
SLOPE COMP
DUPLICATE FOR SECOND
CONTROLLER CHANNEL
SENSE
+
32, 10
SENSE
1, 9
PGOOD1
V
FB1
0.88V
0.72V
L
27
21
+
+
+
+
PGOOD2
FREQ
V
FB2
0.88V
0.72V
+
+
+
+
14
+
+
SWITCH
LOGIC
V
FB
31, 11
R
A
C
C
R
C
C
C2
R
B
0.80V
TRACK/SS
0.88V
0.5µA
11V
RUN
7, 8
I
TH
30, 12
SS
29, 13
+
C
SS
1µA
10µA
SHDN
CURRENT
LIMIT
FOLDBACK
SHDN
RST
2(V
FB
)
SHORT CKT
LATCH-OFF
4
PHASMD
3
2
PLLIN/MODE
20µA
VCO
LDO
EN
INTV
CC
5.1V
SYNC
DET
100k
C
LP
CLK2
CLK1
5
I
LIM
28
V
IN
EXTV
CC
20
22
LDO
PFD
EN
4.7V
5.1V
+
19
SGND
6
EA
OV
LTC3858
11
3858fc
OPERATION
(Refer to the Functional Diagram)
The LTC3858 uses a constant frequency, current mode
step-down architecture with the two controller channels
operating 180 degrees out of phase. During normal op-
eration, each external top MOSFET is turned on when the
clock for that channel sets the RS latch, and is turned off
when the main current comparator, ICMP, resets the RS
latch. The peak inductor current at which ICMP trips and
resets the latch is controlled by the voltage on the I
TH
pin,
which is the output of the error amplifi er, EA. The error
amplifi er compares the output voltage feedback signal at
the V
FB
pin (which is generated with an external resistor
divider connected across the output voltage, V
OUT
, to
ground) to the internal 0.800V reference voltage. When the
load current increases, it causes a slight decrease in V
FB
relative to the reference, which causes the EA to increase
the I
TH
voltage until the average inductor current matches
the new load current.
After the top MOSFET is turned off each cycle, the bottom
MOSFET is turned on until either the inductor current starts
to reverse, as indicated by the current comparator IR, or
the beginning of the next clock cycle.
INTV
CC
/EXTV
CC
Power
Power for the top and bottom MOSFET drivers and most
other internal circuitry is derived from the INTV
CC
pin. When
the EXTV
CC
pin is left open or tied to a voltage less than
4.7V, the V
IN
LDO (low dropout linear regulator) supplies
5.1V from V
IN
to INTV
CC
. If EXTV
CC
is taken above 4.7V,
the V
IN
LDO is turned off and the EXTV
CC
LDO is turned on.
Once enabled, the EXTV
CC
LDO supplies 5.1V from EXTV
CC
to INTV
CC
. Using the EXTV
CC
pin allows the INTV
CC
power
to be derived from a high effi ciency external source such
as one of the LTC3858 switching regulator outputs.
Each top MOSFET driver is biased from the fl oating boot-
strap capacitor, C
B
, which normally recharges during each
switching cycle through an external diode when the top
MOSFET turns off. If the input voltage, V
IN
, decreases to
a voltage close to V
OUT
, the loop may enter dropout and
attempt to turn on the top MOSFET continuously. The
dropout detector detects this and forces the top MOSFET
off for about one-twelfth of the clock period every tenth
cycle to allow C
B
to recharge.
Shutdown and Start-Up (RUN1, RUN2
and SS1, SS2 Pins)
The two channels of the LTC3858 can be independently
shut down using the RUN1 and RUN2 pins. Pulling either of
these pins below 1.26V shuts down the main control loop
for that controller. Pulling both pins below 0.7V disables
both controllers and most internal circuits, including the
INTV
CC
LDOs. In this state, the LTC3858 draws only 8µA
of quiescent current.
The RUN pin may be externally pulled up or driven directly
by logic. When driving the RUN pin with a low impedance
source, do not exceed the absolute maximum rating of
8V. The RUN pin has an internal 11V voltage clamp that
allows the RUN pin to be connected through a resistor to a
higher voltage (for example, V
IN
), so long as the maximum
current into the RUN pin does not exceed 100µA.
The start-up of each controllers output voltage, V
OUT
, is
controlled by the voltage on the SS pin for that channel.
When the voltage on the SS pin is less than the 0.8V internal
reference, the LTC3858 regulates the V
FB
voltage to the SS
pin voltage instead of the 0.8V reference. This allows the
SS pin to be used to program a soft-start by connecting
an external capacitor from the SS pin to SGND. An internal
1µA pull-up current charges this capacitor creating a volt-
age ramp on the SS pin. As the SS voltage rises linearly
from 0V to 0.8V (and beyond up to the absolute maximum
rating of 6V), the output voltage V
OUT
rises smoothly from
zero to its fi nal value.
Short-Circuit Latch-Off
After the controller has been started and been given
adequate time to ramp up the output voltage, the SS
capacitor is used in a short-circuit time-out circuit. Spe-
cifi cally, once the voltage on the SS pin rises above 2V
(the arming threshold), the short-circuit timeout circuit is
enabled (see Figure 1). If the output voltage falls below
70% of its nominal regulated voltage, the SS capacitor
begins discharging with a net 9µA pull-down current on
the assumption that the output is in an overcurrent and/or
short-circuit condition. If the condition lasts long enough
LTC3858
12
3858fc
OPERATION
(Refer to the Functional Diagram)
to allow the SS pin voltage to fall below 1.5V (the latchoff
threshold), the controller will shut down (latch off) until
the RUN pin voltage or the V
IN
voltage is recycled.
The delay time from when a short-circuit occurs until the
controller latches off can be calculated using the follow-
ing equation
t
LATCH
C
SS
V
SS
–1.5V
A
where V
SS
is the initial voltage (must be greater than 2V)
on the SS pin at the time the short-circuit occurs. Normally
the SS pin voltage will have been pulled up to the INTV
CC
voltage (5.1V) by the internal 1µA pull-up current.
Note that the two controllers on the LTC3858 have separate,
independent short-circuit latchoff circuits. Latchoff can be
overridden/defeated by connecting a resistor 150k or less
from the SS pin to INTV
CC
. This resistor provides enough
pull-up current to overcome the 9µA pull-down current
present during a short-circuit. Note that this resistor also
shortens the soft-start period.
Foldback Current
On the other hand, when the output voltage falls to less
than 70% of its nominal level, foldback current limiting
is also activated, progressively lowering the peak current
limit in proportion to the severity of the overcurrent or
short-circuit condition. Even if a short circuit is present
and the short-circuit latch-off is not yet armed (when
SS voltage has not yet reached 2V), a safe, low output
current is provided due to internal current foldback and
actual power wasted is low due to the effi cient nature of
the current mode switching regulator. Foldback current
limiting is disabled during the soft-start interval (as long
as the V
FB
voltage is keeping up with the SS voltage).
Light Load Current Operation (Burst Mode Operation,
Pulse-Skipping or Forced Continuous)
(PLLIN/MODE Pin)
The LTC3858 can be enabled to enter high effi ciency
Burst Mode operation, constant frequency pulse-skip-
ping mode, or forced continuous conduction mode at
low load currents. To select Burst Mode operation, tie the
PLLIN/ MODE pin to ground. To select forced continuous
operation, tie the PLLIN/MODE pin to INTV
CC
. To select
pulse-skipping mode, tie the PLLIN/MODE pin to a DC
voltage greater than 1.2V and less than INTV
CC
– 1.3V.
When a controller is enabled for Burst Mode operation, the
minimum peak current in the inductor is set to approxi-
mately 30% of the maximum sense voltage even though
the voltage on the I
TH
pin indicates a lower value. If the
average inductor current is higher than the load current,
the error amplifi er EA will decrease the voltage on the I
TH
pin. When the I
TH
voltage drops below 0.425V, the internal
sleep signal goes high (enabling “sleep” mode) and both
external MOSFETs are turned off.
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current. If one channel is shut down
and the other channel is in sleep mode, the LTC3858 draws
only 170µA of quiescent current. If both channels are in
sleep mode, the LTC3858 draws only 300µA of quiescent
current. In sleep mode, the load current is supplied by
the output capacitor. As the output voltage decreases, the
EAs output begins to rise. When the output voltage drops
enough, the I
TH
pin is reconnected to the output of the
EA, the sleep signal goes low, and the controller resumes
normal operation by turning on the top external MOSFET
on the next cycle of the internal oscillator.
INTV
CC
2V
0.8V
1.5V
0V
A
–9µA
SS VOLTAGE
LATCH-OFF
COMMAND
SS PIN
CURRENT
OUTPUT
VOLTAGE
LATCH-OFF
ENABLE
SOFT-START INTERVAL
ARMING
t
LATCH
3858 F01
A
Figure 1. Latch-Off Timing Diagram

LTC3858IUH#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Low IQ, Dual, 2-Phase Synchronous Step-Down Controller
Lifecycle:
New from this manufacturer.
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