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LTC4100EG#TRPBF

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LTC4100
10
4100fc
For more information www.linear.com/LTC4100
Overview (Refer to Block Diagram)
The LTC4100 is composed of a battery charger section, a
charger controller, a 10-bit DAC to control charger current,
an 11-bit DAC to control charger voltage, a SafetySignal
decoder, limit decoder and an SMBus controller block. If
no battery is present, the SafetySignal decoder indicates a
RES_OR condition and charging is disabled by the charger
controller (CHGEN = Low). Charging will also be disabled if
DCDIV is low, or the SafetySignal is decoded as RES_HOT.
If a battery is inserted and AC power is connected, the
battery will be charged with an 80mA “wake-up” current.
The wake-up current is discontinued after t
TIMEOUT
if the
SafetySignal is decoded as RES_UR or RES_C0LD, and
the battery or host doesn’t transmit charging commands.
The SMBus interface and control block receives Charg
-
ingCurrent() and
ChargingVoltage() commands via the
SMBus. If ChargingCurrent() and ChargingVoltage()
command pairs are received within a t
TIMEOUT
interval, the
values are stored in the current and voltage DACs and the
charger controller asserts the CHGEN line if the decoded
SafetySignal value will allow charging to commence. Charg
-
ingCurrent() and
ChargingVoltage() values are compared
against limits programmed by the limit decoder block; if
the
commands exceed the programmed limits these limits
are substituted and overrange flags are set.
The charger controller will assert SMBALERT whenever
a status change is detected, namely: AC_PRESENT,
TesT circuiT
+
–
+
–
+
–
EA
V
DAC
0.6V
LT1055
CSP
BAT V
SET
I
TH
LTC4100
1.19V
4100 TC01
21 22 18 19
operaTion
BATTERY_PRESENT, ALARM_INHIBITED, or V
DD
power-
fail. The host may query the charger, via the SMBus, to
obtain ChargerStatus() information. SMBALERT will be
de-asserted upon a successful read of ChargerStatus()
or a successful Alert Response Address (ARA) request.
Battery Charger Controller
The LTC4100 charger controller uses a constant off-time,
current mode step-down architecture. During normal
operation, the top MOSFET is turned on each cycle when
the oscillator sets the SR latch and turned off when
the main current comparator I
CMP
resets the SR latch.
While the top MOSFET is off, the bottom MOSFET is
turned
on until either the inductor current trips the current
comparator I
REV
, or the beginning of the next cycle. The
oscillator uses the equation,
t
OFF
=
V
DCIN
− V
BAT
V
DCIN
• f
OSC
( )
to set the bottom MOSFET on-time. The result is quasi-
constant frequency operation: the converter frequency
remains nearly constant over a wide range of output volt
-
ages. This activity is diagrammed in Figure 3.
The peak inductor current, at which I
CMP
resets the SR
latch, is controlled by the voltage on I
TH
. I
TH
is in turn
controlled by several loops, depending upon the situation
at hand. The average current control loop converts the
V
TOL
=
V
BAT
−
V
VDAC
V
VDAC
• 100
FOR V
VDAC
= 17.57V(0x44A0)
DCIN = 21V
CLN = CLP = 20V
LTC4100
11
4100fc
For more information www.linear.com/LTC4100
operaTion
voltage between CSP and BAT to a representative current.
Error amp CA2 compares this current against the desired
current programmed by the I
DAC
at the I
DC
pin and adjusts
I
TH
for the desired voltage across R
SENSE
.
The voltage at BAT is divided down by an internal resis-
tor divider
set by the V
DAC
and is used by error amp EA
to decrease I
TH
if the divider voltage is above the 1.19V
reference.
The amplifier CL1 monitors and limits the input current,
normally from the AC adapter, to a preset level (100mV/
R
CL
). At input current limit, CL1 will decrease the I
TH
volt-
age to reduce charging current.
An
overvoltage comparator, OV, guards against transient
overshoots (>7%). In this case, the top MOSFET is turned
off until the overvoltage condition is cleared. This feature
is useful for batteries that “load dump” themselves by
opening their protection switch to perform functions such
as calibration or pulse mode charging.
PWM Watchdog Timer
There is a watchdog timer that observes the activity on
the TGATE pin. If TGATE stops switching for more than
40µs, the watchdog activates and turns off the top MOSFET
for about 400ns. The watchdog engages
to prevent very
low
frequency operation in dropout—a potential source
of audible noise when using ceramic input and output
capacitors.
Charger Start-Up
When
the charger is enabled, it will not begin switching
until the I
TH
voltage exceeds a threshold that assures initial
current will be positive. This threshold is 5% to 15% of the
maximum programmed current. After the charger begins
switching, the various loops will control the current at a
level that is higher or lower than the initial current. The
duration of this transient condition depends upon the loop
compensation, but is typically less than 1ms.
SMBus Interface
All communications over the SMBus are interpreted by the
SMBus interface block. The SMBus interface is a SMBus
slave device at address 0x12. All internal LTC4100 registers
may be updated and accessed through the SMBus interface,
and charger controller as required. The SMBus protocol is
a derivative of the I
2
C bus (Reference
I
2
C-Bus and How to
Use It, V1.0
by Philips, and
System Management Bus Speci-
fication
, Version 1.1, from the SBS Implementers Forum, for
a complete description of the bus protocol requirements).
All data is clocked into the shift register on the rising
edge of
SCL. All data is clocked out of the shift register
on
the falling edge of SCL. Detection of an SMBus Stop
condition, or power-on reset via the V
DD
power-fail, will
reset the SMBus interface to an initial state at any time.
The LTC4100 command set is interpreted by the SMBus
interface and passed onto the charger controller block as
control signals or updates to internal registers.
Figure 3
t
OFF
OFF
OFF
ON
ON
TGATE
BGATE
INDUCTOR
CURRENT
TRIP POINT SET
BY I
TH
VOLTAGE
4100 F03
*http://www.SBS-FORUM.org
LTC4100
12
4100fc
For more information www.linear.com/LTC4100
operaTion
Description of Supported Battery Charger Functions
The functions are described as follows (see Table 1 also):
FunctionName() ‘hnn (command code)
Description: A brief description of the function.
Purpose: The purpose of the function, and an example
where appropriate.
•SMBus Protocol: Refer to Section 5 of the Smart
Battery Charger specification for more details.
Input, Output or Input/Output: A description of the data
supplied to or returned by the function.
ChargerSpecInfo() (‘h11)
Description: The SMBus Host uses this command to read
the LTC4100’s extended status bits.
Purpose: Allows the System Host to determine the
specification revision the charger supports as well as
other extended status information.
•SMBus Protocol: Read Word.
Output: The CHARGER_SPEC indicates that the LTC4100
supports Version 1.1 of the Smart Battery Charger
Specification. The SELECTOR_SUPPORT indicates that
the LTC4100 does not support the optional Smart Battery
Selector Commands.
ChargerMode() (‘h12)
Description: The SMBus Host uses this command to set
the various charger modes. The default values are set to
allow a Smart Battery and the LTC4100 to work in concert
without requiring an SMBus Host.
Purpose: Allows the SMBus Host to configure the charger
and change the default
modes. This is
a write only function,
but the value of the “mode” bit, INHIBIT_CHARGE may be
determined using the ChargerStatus() function.
•SMBus Protocol: Write Word.
Input: The INHIBIT_CHARGE bit allows charging to be
inhibited without changing the ChargingCurrent() and
ChargingVoltage() values. The charging may be resumed
by clearing this bit. This bit is automatically cleared when
power is reapplied or when a battery is reinserted.
The ENABLE_POLLING bit is not supported by the LTC4100.
Values written to this bit are ignored.
The POR_RESET bit sets the LTC4100 to its power-on
default condition.
The RESET_TO_ZERO bit sets the ChargingCurrent()and
ChargingVoltage() values to zero. This function ALWAYS
clears the ChargingVoltage() and ChargingCurrent() values
to zero even if the INHIBIT_CHARGE bit is set.
ChargerStatus() (‘h13)
Description: The SMBus Host uses this command to read
the LTC4100’s status bits.
Purpose: Allows the SMBus Host to determine the status
and level of the LTC4100.
•SMBus Protocol: Read Word.
Output: The CHARGE_INHIBITED bit reflects the status
of the LTC4100 set by the INHIBIT_CHARGE bit in the
ChargerMode() function.
The POLLING_ENABLED, VOLTAGE_NOTREG, and
CURRENT_NOTREG are not supported by the LTC4100.
The LTC4100 always reports itself as a Level 2 Smart
Battery Charger.
CURRENT_OR bit is set only when ChargingCurrent()
is set to a value outside the current regulation range of
the LTC4100. This bit may be used in conjunction with
the INHIBIT_CHARGE bit of the ChargerMode() and
ChargingCurrent() to determine the current capability of
the LTC4100. When ChargingCurrent() is set to
the I
LIM
+ 1, the CURRENT_OR bit will be set.
VOLTAGE_OR bit is set only when ChargingVoltage()
is set to a value outside the voltage regulation range of
the LTC4100. This bit may be used in conjunction with
the INHIBIT_CHARGE bit of the ChargerMode() and
ChargingVoltage() to determine the voltage capability of
the LTC4100. When ChargingVoltage() is set to the V
LIM
,
the VOLTAGE_OR bit will be set.
The RES_OR bit is set only when the SafetySignal resis
-
tance value is greater than 95kΩ. This indicates that the
SafetySignal is to be considered as an open circuit.
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LTC4100EG#TRPBF

Mfr. #:
Buy LTC4100EG#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management Smart-Battery Charger with SMBus Interface
Lifecycle:
New from this manufacturer.
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