LTC4100
23
4100fc
For more information www.linear.com/LTC4100
applicaTions inForMaTion
The MOSFET power dissipations at maximum output
current are given by:
PMAIN = V
OUT
/V
IN
(I
MAX
)
2
(1 + δ∆T)R
DS(ON)
+ k(V
IN
)
2
(I
MAX
)(C
RSS
)(f
OSC
)
PSYNC = (V
IN
– V
OUT
)/V
IN
(I
MAX
)
2
(1 + δ∆T)R
DS(ON)
where δ∆T is the temperature dependency of R
DS(ON)
and
k is a constant inversely related to the gate drive current.
Both MOSFETs have I
2
R losses while the PMAIN equation
includes an additional term for transition losses, which
are highest at high input voltages. For V
IN
< 20V the high
current efficiency generally improves with larger MOSFETs,
while for V
IN
> 20V the transition losses rapidly increase to
the point that the use of a higher R
DS(ON)
device with lower
C
RSS
actually provides higher efficiency. The synchronous
MOSFET losses are greatest at high input voltage or during
a short circuit when the duty cycle in this switch in nearly
100%. The term (1 + δ∆T) is generally given for a MOSFET
in the form of a normalized R
DS(ON)
vs temperature curve,
but δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs. C
RSS
= Q
GD
/∆V
DS
is usually specified
in the MOSFET characteristics. The constant k = 2 can be
used to estimate the contributions of the two terms in the
main switch dissipation equation.
If the charger is to operate in low dropout mode or with
a high duty cycle greater than 85%, then the topside
P-channel efficiency generally improves with a larger
MOSFET. Using asymmetrical MOSFETs may achieve cost
savings or efficiency gains.
The Schottky diode D1, shown in the typical application
on the back page, conducts during the dead-time between
the conduction of the two power MOSFETs. This prevents
the body diode of the bottom MOSFET from turning on
and storing charge during the dead-time, which could cost
as much as 1% in efficiency. A 1A Schottky is generally
a good size for 4A regulators due to the relatively small
average current. Larger diodes can result in additional
transition losses due to their larger junction capacitance.
The diode may be omitted if the efficiency loss can be
tolerated.
Calculating IC Power Dissipation
The power dissipation of the LTC4100 is dependent upon
the gate charge of the top and bottom MOSFETs (Q2 &
Q3 respectively) The gate charge (QG) is determined from
the manufacturer’s
data sheet and is dependent upon both
the gate voltage swing and the drain voltage swing of the
MOSFET. Use 6V for the gate voltage swing and V
DCIN
for
the drain voltage swing.
PD = V
DCIN
•(f
OSC
(QG
Q2
+ QG
Q3
) + I
DCIN
) + V
DD
•I
DD
Example: V
DCIN
= 19V, f
OSC
= 345kHz, QG
Q2
= 25nC,
QG
Q3
= 15nC, I
DCIN
= 5mA, V
DD
= 5.5V,
I
DD
= 1mA.
PD = 428mW
Calculating V
DD
Current
The LTC4100 V
DD
current, or I
DD
, consist of three parts:
a. I
RUN
= Current due to active clocking and bias inside
the IC.
b.
I
THRM
= Current due to thermistor circuit activity.
c. I
ACCEL
= Current due to SMBus acceleration activity.
I
DD
= I
RUN
+ I
THRM
+ I
ACCEL
a) I
RUN
current is basically independent of SCL clock rate.
Once the LTC4100 determines that there is activity on
the SMBus, it turns on its internal HF oscillator. This
HF oscillator remains on until a stop event occurs or
SDA and SCL are at logic level 1 for the SMBus timeout
period. Then it shuts off the HF oscillator. Thus, the
length of the transmission and the rate of transmission
bursts are more important in determining how much
current the LTC4100
burns, rather than the SCL rate.
In
the equation below, I
Q
is the static current the IC
consumes as a function of the V
DD
voltage when not
active. Since it is hard to quantify the actual messages
going down the SMBus, one must estimate the SMBus
activity level in term of bus utilization per second.
I
RUN
= Message Duty Cycle•950µA
+ (1 – Message Duty Cycle)•I
Q
where I
Q
(typical) = V
DD
/47.2k
