4
INDUSTRIAL TEMPERATURE RANGE
IDT5T9955
2.5V PROGRAMMABLE SKEW DUAL PLL CLOCK DRIVER TURBOCLOCK W
Output skew with respect to the REF input is adjustable to compensate
for PCB trace delays, backplane propagation delays or to accommodate
requirements for special timing relationships between clocked compo-
nents. Skew is selectable as a multiple of a time unit (tU) which ranges
from 782ps to 1.5625ns (see Programmable Skew Range and Resolu-
tion Table). There are nine skew configurations available for each out-
put pair. These configurations are chosen by the xnF
1:0 control pins. In
order to minimize the number of control pins, 3-level inputs (HIGH-MID-
LOW) are used, they are intended for but not restricted to hard-wiring.
Undriven 3-level inputs default to the MID level. Where programmable
skew is not a requirement, the control pins can be left open for the zero
skew default setting. The Control Summary Table shows how to select
specific skew taps by using the xnF1:0 control pins.
PROGRAMMABLE SKEW
EXTERNAL FEEDBACK
By providing two separate external feedbacks, the IDT5T9955 gives
users flexibility with regard to skew adjustment. The xFB signal is com-
pared with the input REF signal at the phase detector in order to drive
the VCO. Phase differences cause the VCO of the PLL to adjust up-
wards or downwards accordingly.
NOTES:
1. The device may be operated outside recommended frequency ranges without damage, but functional operation is not guaranteed.
2. The level to be set on xFS is determined by the nominal operating frequency of the VCO and Time Unit Generator. The VCO frequency always appears at x1Q1:0, x2Q1:0, and
the higher outputs when they are operated in their undivided modes. The frequency appearing at the REF and xFB inputs will be FNOM when the output connected to xFB is
undivided and xDS[1:0] = MM. The frequency of the REF and xFB inputs will be FNOM /2 or FNOM /4 when the part is configured for frequency multiplication by using a divided
output as the xFB input and setting xDS[1:0] = MM. Using the xDS[1:0] inputs allows a different method for frequency multiplication (see Divide Selection Table).
3. Skew adjustment range assumes that a zero skew output is used for feedback. If a skewed xQ output is used for feedback, then adjustment range will be greater. For example
if a 4tU skewed output is used for feedback, all other outputs will be skewed –4tU in addition to whatever skew value is programmed for those outputs. ‘Max adjustment’ range
applies to output pairs 3 and 4 where ±6tU skew adjustment is possible and at the lowest FNOM value.
An internal loop filter moderates the response of the VCO to the
phase detector. The loop filter transfer function has been chosen to
provide minimal jitter (or frequency variation) while still providing accu-
rate responses to input frequency changes.
xFS = LOW xFS = MID xFS = HIGH Comments
Timing Unit Calculation (tU) 1/(32 x FNOM) 1/(16 x FNOM) 1/(8 x FNOM)
VCO Frequency Range (FNOM)
(1,2)
24 to 40MHz 40 to 80MHz 80 to 160MHz
Skew Adjustment Range
(3)
Max Adjustment: ±7.8125ns ±9.375ns ±9.375ns ns
±67.5° ±135° ±270° Phase Degrees
±18.75% ±37.5% ±75% % of Cycle Time
Example 1, FNOM = 25MHz tU = 1.25ns
Example 2, FNOM = 37.5MHz tU = 0.833ns
Example 3, FNOM = 50MHz tU = 1.25ns
Example 4, FNOM = 75MHz tU = 0.833ns
Example 5, FNOM = 100MHz tU = 1.25ns
Example 6, FNOM = 150MHz tU = 0.833ns
PROGRAMMABLE SKEW RANGE AND RESOLUTION TABLE
5
INDUSTRIAL TEMPERATURE RANGE
IDT5T9955
2.5V PROGRAMMABLE SKEW DUAL PLL CLOCK DRIVER TURBOCLOCK W
DIVIDE SELECTION TABLE
xDS [1:0] xFB Divide-by-n Permitted Output Divide-by-n connected to xFBIN
(1)
LL 2 1 or 2
LM 3 1
LH 4 1, 2, or 4
ML 5 1 or 2
M M 1 1, 2, or 4
M H 6 1 or 2
HL 8 1 or 2
HM 10 1
HH 12 1
NOTE:
1. Permissible output division ratios connected to xFB. The frequency of the REF input will be FNOM/N when the part is configured for frequency multiplication by using an undivided
output for xFB and setting xDS[1:0] to N (N = 1-6, 8, 10, 12).
CONTROL SUMMARY TABLE FOR FEEDBACK SIGNALS
xnF1:0 Skew (Pair #1, #2) Skew (Pair #3) Skew (Pair #4)
LL
(1)
–4tU Divide by 2 Divide by 2
LM –3tU –6tU –6tU
LH –2tU –4tU –4tU
ML –1tU –2tU –2tU
M M Zero Skew Zero Skew Zero Skew
MH 1tU 2tU 2tU
HL 2tU 4tU 4tU
HM 3tU 6tU 6tU
HH 4tU Divide by 4 Inverted
(2)
NOTES:
1. LL disables outputs if TEST = MID and xsOE = HIGH.
2. When pair #4 is set to HH (inverted), xsOE disables pair #4 HIGH when xPE = HIGH, xsOE disables pair #4 LOW when xPE = LOW.
RECOMMENDED OPERATING RANGE
Symbol Description Min. Typ. Max. Unit
VDD/VDDQ Power Supply Voltage 2.3 2.5 2.7 V
TA Ambient Operating Temperature -40 +25 +85 ° C
6
INDUSTRIAL TEMPERATURE RANGE
IDT5T9955
2.5V PROGRAMMABLE SKEW DUAL PLL CLOCK DRIVER TURBOCLOCK W
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Symbol Parameter Conditions
(1)
Min. Max. Unit
VIH Input HIGH Voltage Guaranteed Logic HIGH (REF, xFB Inputs Only) 2 V
VIL Input LOW Voltage Guaranteed Logic LOW (REF, xFB Inputs Only) 0.7 V
VIHH Input HIGH Voltage
(2)
3-Level Inputs Only VDD0.4 V
VIMM Input MID Voltage
(2)
3-Level Inputs Only VDD/20.2 VDD/2+0.2 V
VILL Input LOW Voltage
(2)
3-Level Inputs Only 0.4 V
I
IN Input Leakage Current VIN = VDD or GND 5+5μA
(REF, xFB Inputs Only) VDD = Max.
VIN = VDD HIGH Level +400
I3 3-Level Input DC Current VIN = VDD/2 MID Level 100 +100 μA
(TEST, xFS, xnF[1:0], xDS[1:0])VIN = GND LOW Level 400
IPU Input Pull-Up Current (xPE, xPD)VDD = Max., VIN = GND 25 μA
IPD Input Pull-Down Current (xsOE)VDD = Max., VIN = VDD +100 μA
VOH Output HIGH Voltage VDD = Min., IOH = 2mA (xLOCK Output) 2 V
VDDQ = Min., IOH = 12mA (xnQ[1:0] Outputs) 2
VOL Output LOW Voltage VDD = Min., IOL = 2mA (xLOCK Output) 0.4 V
VDDQ = Min., IOL = 12mA (xnQ[1:0] Outputs) 0.4
NOTES:
1. All conditions apply to A and B banks.
2. These inputs are normally wired to VDD, GND, or unconnected. Internal termination resistors bias unconnected inputs to VDD/2. If these inputs are switched, the function and timing
of the outputs may be glitched, and the PLL may require an additional tLOCK time before all datasheet limits are achieved.
NOTES:
1. Measurements are for divide-by-1 outputs, xnF[1:0] = MM, and xDS[1:0] = MM. All conditions apply to A and B banks.
2. For nominal voltage and temperature.
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions
(1)
Typ.
(2)
Max. Unit
IDDQ Quiescent Power Supply Current VDD = Max., TEST = MID, REF = LOW, 40 60 mA
xPE = LOW, xsOE = LOW, xPD = HIGH
FS = MID, All outputs unloaded
IDDPD Power Down Current VDD = Max., xPD = LOW, xsOE = LOW 50 μA
xPE = HIGH, TEST = HIGH, xFS = HIGH
xnF[1:0] = HH, xDS[1:0] = HH
ΔIDD Power Supply Current per Input HIGH VIN = 2.3V, VDD = Max., xPD = LOW 1 60 μA
(REF and xFB inputs only) TEST = HIGH
xFS = L 190 290
IDDD Dynamic Power Supply Current per Output xFS = M 150 230 μA/MHz
xFS = H 130 200
xFS = L FVCO = 40MHz, CL = 0pF 98
ITOT Total Power Supply Current xFS = M FVCO = 80MHz, CL = 0pF 132 mA
xFS = H FVCO = 160MHz, CL = 0pF 206

5T9955BFGI

Mfr. #:
Manufacturer:
Description:
IC CLK DRIVER DUAL PLL 96-FBGA
Lifecycle:
New from this manufacturer.
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