Dual, Low Noise, Wideband
Variable Gain Amplifiers
AD600/AD602
Rev. F
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FEATURES
2 channels with independent gain control
Linear in dB gain response
2 gain ranges
AD600: 0 dB to 40 dB
AD602: –10 dB to +30 dB
Accurate absolute gain: ±0.3 dB
Low input noise: 1.4 nV/√Hz
Low distortion: −60 dBc THD at ±1 V output
High bandwidth: dc to 35 MHz (−3 dB)
Stable group delay: ±2 ns
Low power: 125 mW (maximum) per amplifier
Signal gating function for each amplifier
Drive high speed ADCs
MIL-STD-883-compliant and DESC versions available
APPLICATIONS
Ultrasound and sonar time-gain controls
High performance audio and RF AGC systems
Signal measurement
GENERAL DESCRIPTION
The AD600/AD602
1
dual-channel, low noise, variable gain
amplifiers are optimized for use in ultrasound imaging systems
but are applicable to any application requiring precise gain, low
noise and distortion, and wide bandwidth. Each independent
channel provides a gain of 0 dB to +40 dB in the AD600 and
−10 dB to +30 dB in the AD602. The lower gain of the AD602
results in an improved signal-to-noise ratio (SNR) at the output.
However, both products have the same 1.4 nV/√Hz input noise
spectral density. The decibel gain is directly proportional to the
control voltage, accurately calibrated, and supply and temper-
ature stable.
To achieve the difficult performance objectives, a proprietary
circuit form, the X-AMP®, was developed. Each channel of the
X-AMP comprises a variable attenuator of 0 dB to −42.14 dB
followed by a high speed fixed gain amplifier. In this way, the
amplifier never has to cope with large inputs and can benefit
from the use of negative feedback to precisely define the gain
and dynamics. The attenuator is realized as a 7-stage R-2R
ladder network having an input resistance of 100 , laser
trimmed to ±2%. The attenuation between tap points is 6.02 dB;
the gain-control circuit provides continuous interpolation between
these taps. The resulting control function is linear in dB.
1
Patented.
FUNCTIONAL BLOCK DIAGRAM
PRECISION PASSIVE
INPUT ATTENUATOR
GATING
INTERFACE
SCALING
REFERENCE
G
A
T1
A1OP
A1CM
C1HI
C1LO
A1HI
A1LO
V
G
R-2R LADDER NETWORK
GAIN CONTROL
INTERFACE
RF2
2.24k (AD600)
694 (AD602)
RF1
20
FIXED-GAIN
AMPLIFIER
41.07dB (AD600)
31.07dB (AD602)
500
0dB
–6.02dB
–12.04dB
–18.06dB
–22.08dB
–30.1dB
–36.12dB
–42.14dB
62.5
00538-001
Figure 1. Functional Block Diagram of a Single Channel of the AD600/AD602
The gain-control interfaces are fully differential, providing an
input resistance of ~15 M and a scale factor of 32 dB/V (that
is, 31.25 mV/dB) defined by an internal voltage reference. The
response time of this interface is less than 1 µs. Each channel
also has an independent gating facility that optionally blocks
signal transmission and sets the dc output level to within a few
millivolts of the output ground. The gating control input is
TTL- and CMOS-compatible.
The maximum gain of the AD600 is 41.07 dB, and the maximum
gain of the AD602 is 31.07 dB; the −3 dB bandwidth of both
models is nominally 35 MHz, essentially independent of the
gain. The SNR for a 1 V rms output and a 1 MHz noise
bandwidth is typically 76 dB for the AD600 and 86 dB for the
AD602. The amplitude response is flat within ±0.5 dB from
100 kHz to 10 MHz; over this frequency range, the group delay
varies by less than ±2 ns at all gain settings.
Each amplifier channel can drive 100  load impedances with
low distortion. For example, the peak specified output is ±2.5 V
minimum into a 500  load or ±1 V into a 100  load. For a
200  load in shunt with 5 pF, the total harmonic distortion for
a ±1 V sinusoidal output at 10 MHz is typically −60 dBc.
The AD600J/AD602J are specified for operation from 0°C to 70°C
and are available in 16-lead PDIP (N) and 16-lead SOIC packages.
The AD600A/AD602A are specified for operation from −40°C to
+85°C and are available in 16-lead CERDIP (Q) and 16-lead SOIC
packages. The AD600S/AD602S are specified for operation from
−55°C to +125°C, are available in a 16-lead CERDIP (Q) package,
and are MIL-STD-883-compliant. The AD600S/AD602S are also
available under DESC SMD 5962-94572.
AD600/AD602
Rev. F | Page 2 of 32
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 10
Noise Performance ..................................................................... 10
Gain-Control Interface .............................................................. 11
Signal-Gating Inputs .................................................................. 11
Common-Mode Rejection ........................................................ 11
Achieving 80 dB Gain Range .................................................... 11
Sequential Mode (Maximum SNR) ......................................... 12
Parallel Mode (Simplest Gain-Control Interface) .................. 13
Low Ripple Mode (Minimum Gain Error) ............................. 13
Applications Information .............................................................. 15
Time-Gain Control (TGC) and Time-Variable
Gain (TVG) ................................................................................. 15
Increasing Output Drive ............................................................ 15
Driving Capacitive Loads .......................................................... 15
Realizing Other Gain Ranges ................................................... 16
Ultralow Noise VCA .................................................................. 16
Low Noise, 6 dB Preamplifier ................................................... 16
Low Noise AGC Amplifier with 80 dB Gain Range .............. 17
Wide Range, RMS-Linear dB Measurement System
(2 MHz AGC Amplifier with RMS Detector) ........................ 19
100 dB to 120 dB RMS Responding Constant Bandwidth
AGC Systems with High Accuracy Decibel Outputs ............ 21
100 dB RMS/AGC System with Minimal Gain Error
(Parallel Gain with Offset) ........................................................ 22
120 dB RMS/AGC System with Optimal SNR
(Sequential Gain) ....................................................................... 23
Outline Dimensions ....................................................................... 27
Ordering Guide .......................................................................... 29
REVISION HISTORY
10/08—Rev. E to Rev. F
Changes to Power Supply Parameter, Table 1 ............................... 3
Changes to Figure 41 ...................................................................... 20
Changes to Figure 45 ...................................................................... 21
Changes to Figure 47 ...................................................................... 22
Changes to Figure 51 ...................................................................... 24
Updated Outline Dimensions ....................................................... 27
Changes to Ordering Guide .......................................................... 29
1/06—Rev. D to Rev. E
Updated Format .................................................................. Universal
Changes to Table 2 ............................................................................ 5
Changes to The Gain-Control Interface Section ........................ 11
Updated Outline Dimensions ....................................................... 27
Changes to Ordering Guide .......................................................... 28
3/04—Rev. C to Rev. D
Changes to Specifications ................................................................ 2
Changes to Ordering Guide ............................................................ 3
Changes to Figure 3 .......................................................................... 8
Changes to Figure 29 ...................................................................... 18
Updated Outline Dimensions ....................................................... 20
5/02—Rev. B to Rev. C
Changes to Specifications ................................................................. 2
Renumber Tables and TPCs ................................................... Global
8/01—Rev. A to Rev. B
Changes to Accuracy Section of AD600A/AD602A column ...... 2
AD600/AD602
Rev. F | Page 3 of 32
SPECIFICATIONS
Each amplifier section at T
A
= 25°C, V
S
= ±5 V, −625 mV ≤ V
G
≤ +625 mV, R
L
= 500 Ω, and C
L
= 5 pF, unless otherwise noted.
Specifications for the AD600/AD602 are identical, unless otherwise noted.
Table 1.
AD600J/AD602J
1
AD600A/AD602A
1
Parameter Conditions Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
Input Resistance Pin 2 to Pin 3; Pin 6 to Pin 7
98
100
102 95
100
105
Input Capacitance 2 2 pF
Input Noise Spectral Density
2
1.4 1.4 nV/√Hz
Noise Figure R
S
= 50 Ω, maximum gain 5.3 5.3 dB
R
S
= 200 Ω, maximum gain 2 2 dB
Common-Mode Rejection Ratio f = 100 kHz 30 30 dB
OUTPUT CHARACTERISTICS
−3 dB Bandwidth V
OUT
= 100 mV rms 35 35 MHz
Slew Rate 275 275 V/µs
Peak Output
3
R
L
≥ 500 Ω ±2.5 ±3 ±2.5 ±3 V
Output Impedance f ≤ 10 MHz 2 2
Output Short-Circuit Current 50 50 mA
Group Delay Change vs. Gain f = 3 MHz; full gain range ±2 ±2 ns
Group Delay Change vs. Frequency V
G
= 0 V, f = 1 MHz to 10 MHz ±2 ±2 ns
Total Harmonic Distortion R
L
= 200 Ω, V
OUT
= ±1 V peak, R
PD
= 1 kΩ −60 −60 dBc
ACCURACY
AD600
Gain Error 0 dB to 3 dB gain
0
+0.5
+1 −0.5
+0.5
+1.5
dB
3 dB to 37 dB gain
−0.5
±0.2
+0.5 −1.0
±0.2
+1.0
dB
37 dB to 40 dB gain
−1
−0.5
0 −1.5
−0.5
+0.5
dB
Maximum Output Offset Voltage
4
V
G
= –625 mV to +625 mV 10
50
10
65
mV
Output Offset Variation V
G
= –625 mV to +625 mV 10
50
10
65
mV
AD602
Gain Error –10 dB to –7 dB gain
0
+0.5
+1 –0.5
+0.5
+1.5
dB
–7 dB to +27 dB gain
−0.5
±0.2
+0.5 −1.0
±0.2
+1.0
dB
27 dB to 30 dB gain
−1
−0.5
0 −1.5
−0.5
+0.5
dB
Maximum Output Offset Voltage
4
V
G
= −625 mV to +625 mV 5
30
10
45
mV
Output Offset Variation V
G
= −625 mV to +625 mV 5
30
10
45
mV
GAIN CONTROL INTERFACE
Gain Scaling Factor
+3 dB to +37 dB (AD600);
−7 dB to +27 dB (AD602)
31.7
32
32.3 30.5
32
33.5
dB/V
Common-Mode Range −0.75 +2.5 −0.75 +2.5 V
Input Bias Current 0.35 1 0.35 1 A
Input Offset Current 10 50 10 50 nA
Differential Input Resistance Pin 1 to Pin 16; Pin 8 to Pin 9 15 15 MΩ
Response Rate Full 40 dB gain change 40 40 dB/s

AD600JN

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
IC OPAMP VGA 35MHZ 16DIP
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