1
DATASHEET
Synchronous Buck Pulse-Width Modulator (PWM)
Controller
ISL6535
The ISL6535 is a high performance synchronous controller for
demanding DC/DC converter applications. It provides
overcurrent fault protection and is designed to safely start-up
into prebiased output loads.
The output voltage of the converter can be precisely regulated
to as low as 0.597V, with a maximum tolerance of ±1% over
the commercial temperature range, and ±1.5% over the
industrial temperature range.
The ISL6535 provides simple, single feedback loop, voltage
mode control with fast transient response. It includes a
triangle wave oscillator that is adjustable from below 50kHz to
over 1.5MHz. Full (0% to 100%) PWM duty cycle support is
provided.
The error amplifier features a 15MHz gain bandwidth product
and 6V/µs slew rate, which enables high converter bandwidth
for fast transient performance.
The ISL6535's overcurrent protection monitors the current by
using the r
DS(ON)
of the upper MOSFET, which eliminates the
need for a current sensing resistor.
Pin Configurations
ISL6535 (14 LD SOIC)
TOP VIEW
ISL6535 (16 LD QFN)
TOP VIEW
Features
Operates from +12V input
Excellent output voltage regulation
- 0.597V internal reference
- ±1% over the commercial temperature range
- ±1.5% over the industrial temperature range
Simple single-loop control design
- Voltage-mode PWM control
Fast transient response
- High-bandwidth error amplifier
- Full 0% to 100% duty ratio
- Leading and falling edge modulation
•Small converter size
- Constant frequency operation
- Oscillator programmable from 50kHz to over 1.5MHz
12V high-speed MOSFET gate drivers
- 2.0A source/3A sink at 12V low-side gate drive
- 1.25A source/2A sink at 12V high-side gate drive
- Drives two N-channel MOSFETs
Overcurrent fault monitor
- High-side MOSFET’s r
DS(ON)
sensing
- Reduced ~120ns blanking time
Converter can source and sink current
Soft-start done and an external reference pin for tracking
applications are available in the QFN package
Pin compatible with ISL6522
Supports start-up into prebiased loads
Pb-free (RoHS compliant)
Applications
Power Supply for some Pentium™, PowerPC™, as well as
graphic CPUs
High-power 12V input DC/DC regulators
Low-voltage distributed power supplies
SS
COMP
FB
EN
GND
RT
PGND
VCC
UGATE
12
13
14
11
10
9
8
1
2
3
4
5
7
6
OCSET
PHASE
PVCC
LGATE
BOOT
SSDONE
SS
COMP
FB
EN
REFIN
RT
PGND
PVCC
UGATE
OCSET
PHASE
VCC
GND
LGATE
BOOT
1
3
4
1516 14 13
2
12
10
9
11
6578
PAD
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Copyright Intersil Americas LLC 2006, 2007, 2015, 2016. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
March 3, 2016
FN9255.3
ISL6535
2
FN9255.3
March 3, 2016
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Pin Descriptions
PIN #
SOIC
PIN #
QFN PIN NAME DESCRIPTION
1 14 RT This pin provides oscillator switching frequency adjustment. By placing a resistor (R
RT
) from
this pin to GND, the switching frequency is set from between 200kHz and 1.5MHz according
Equation 1
:
Alternately ISL6535’s switching frequency can be lowered from 200kHz to 50kHz by
connecting the RT pin with a resistor to VCC according to Equation 2
:
2 15 OCSET The current limit is programmed by connecting this pin with a resistor and capacitor to the
drain of the high-side MOSEFT. A 200µA current source develops a voltage across the
resistor, which is then compared with the voltage developed across the high-side MOSFET. A
blanking period of 120ns is provided for noise immunity.
3 1 SS Connect a capacitor from this pin to ground. This capacitor, along with an internal 30µA
current source, sets the soft-start interval of the converter.
4 2 COMP COMP and FB are the available external pins of the error amplifier. The FB pin is the inverting
input of the error amplifier and the COMP pin is the error amplifier output. These pins are
used to compensate the voltage-control feedback loop of the converter.
53FB
6 4 EN This pin is a TTL compatible input. Pull this pin below 0.8V to disable the converter. In
shutdown the soft-start pin is discharged and the UGATE and LGATE pins are held low.
7 6 GND Signal ground for the IC. All voltage levels are measured with respect to this pin.
8 7 PHASE This pin connects to the source of the high-side MOSFET and the drain of the low-side
MOSFET. This pin represents the return path for the high-side gate driver. During normal
switching, this pin is used for high-side current sensing.
9 8 UGATE Connect UGATE to the upper MOSFET gate. This pin provides the gate drive for the upper
MOSFET.
10 9 BOOT This pin provides bias to the upper MOSFET driver. A bootstrap circuit may be used to create
a BOOT voltage suitable to drive a standard N-channel MOSFET.
11 10 PGND This is the power ground connection. Tie the lower MOSFET source and board ground to this
pin.
12 11 LGATE Connect LGATE to the lower MOSFET gate. This pin provides the gate drive for the lower
MOSFET.
13 12 PVCC Provide a 12V ±10% bias supply for the lower gate drive to this pin. This pin should be
bypassed with a capacitor to PGND.
14 13 VCC Provide a 12V bias supply for the chip to this pin. The pin should be bypassed with a capacitor
to GND.
- 5 REFIN Upon enable if REFIN is less than 2.2V, the external reference pin is used as the control
reference instead of the internal 0.597V reference. An internal 6µA pull-up to 5V is provided
for disabling this functionality.
- 16 SSDONE Provides an open-drain signal at the end of soft-start.
- PAD EPAD The exposed pad is at GND potential, but does not conduct current; the GND and PGND pins
must be used for bias current. The pad should be tied to a GND plane with as many thermal
vias as possible, for optimal thermal performance.
R
RT
k
6500
F
s
kHz200 kHz
-------------------------------------------------------
1.3k
(R
RT
to GND)
(EQ. 1)
R
RT
k
55000
200 kHzF
s
kHz
-------------------------------------------------------
70k+
(R
RT
to VCC)
(EQ. 2)
ISL6535
3
FN9255.3
March 3, 2016
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Ordering Information
PART NUMBER
(Notes 4
, 5)
PART
MARKING
TEMP.
RANGE (°C)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
ISL6535CBZ (Note 1) 6535CBZ 0 to +70 14 Ld SOIC M14.15
ISL6535IBZ (Note 1
) 6535IBZ -40 to +85 14 Ld SOIC M14.15
ISL6535CRZ (Note 2
) 65 35CRZ 0 to +70 16 Ld 4x4 QFN L16.4x4
ISL6535IRZ (Note 3) 65 35IRZ -40 to +85 16 Ld 4x4 QFN L16.4x4
1. Add “-T” suffix for 2.5k unit tape and reel option. Please refer to TB347
for details on reel specifications.
2. Add “-T” suffix for 6k unit tape and reel option. Please refer to TB347
for details on reel specifications.
3. Add “-T” suffix for 6k unit or -TK for 1k unit tape and reel options. Please refer to TB347
for details on reel specifications.
4. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
5. For Moisture Sensitivity Level (MSL), please see product information page for ISL6535
. For more information on MSL, please see tech brief TB363.
Block Diagram
FIGURE 1. BLOCK DIAGRAM
SOFT-START
BOOT
UGATE
GND
FB
AND
FAULT LOGIC
COMP
PGND
LGATE
EA
PWM
PVCC
VCC
GATE
CONTROL
LOGIC
INTERNAL
REGULATOR
OSCILLATOR
RT
30mA
SSDONE
SS
POWER-ON
RESET (POR)
(QFN ONLY)
REFIN
V
REF
= 0.597V
REFERENCE
EN
(QFN ONLY)
OCSET
200mA
SOURCE OCP
PHASE
6mA

ISL6535CBZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers PWM CNTRLR DDRG 14LD N
Lifecycle:
New from this manufacturer.
Delivery:
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