ISL6535
8
FN9255.3
March 3, 2016
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Oscillator
The oscillator is a triangular waveform, providing for leading and
falling edge modulation. The peak-to-peak of the ramp
amplitude is set at 1.9V and varies as a function of frequency. At
50kHz the peak-to-peak amplitude is approximately 1.8V while
at 1.5MHz it is approximately 2.2V. In the event the regulator
operates at 100% duty cycle for 64 clock cycles an automatic
boot cap refresh circuit will activate turning on LG for
approximately 1/2 of a clock cycle.
Overcurrent Protection
The OCP function is enabled with the drivers at start-up. OCP is
implemented via a resistor (R
OCSET
) and a capacitor (C
OCSET
)
connecting the OCSET pin and the drain of the high-side MOSEFT.
An internal 200µA current source develops a voltage across
R
OCSET
, which is then compared with the voltage developed
across the high-side MOSFET at turn-on as measured at the
PHASE pin. When the voltage drop across the MOSFET exceeds
the voltage drop across the resistor, a sourcing OCP event occurs.
The C
OCSET
is placed in parallel with R
OCSET
to smooth the
voltage across R
OCSET
in the presence of switching noise on the
input bus.
A 120ns blanking period is used to reduce the current sampling
error due to leading-edge switching noise. An additional
simultaneous 120ns low pass filter is used to further reduce
measurement error due to noise.
OCP faults cause the regulator to disable (upper and lower drives
disabled, SSDONE pulled low, soft-start capacitor discharged)
itself for a fixed period of time, after which a normal soft-start
sequence is initiated. If the voltage on the SS pin is already at 4V
and an OCP is detected, a 30mA current sink is immediately
applied to the SS pin. If an OCP is detected during soft-start, the
30µA current sink will not be applied until the voltage on the SS
pin has reached 4V. This current sink discharges the CSS
capacitor in a linear fashion. Once the voltage on the SS pin has
reached approximately 0V, the normal soft-start sequence is
initiated. If the fault is still present on the subsequent restart, the
ISL6535 will repeat this process in a hiccup mode. Figure 7
shows a typical reaction to a repeated overcurrent condition that
places the regulator in a hiccup mode. If the regulator is
repeatedly tripping overcurrent, the hiccup period can be
approximated by Equation 5:
The OCP trip point varies mainly due to MOSFET r
DS(ON)
variations and layout noise concerns. To avoid overcurrent
tripping in the normal operating load range, find the ROCSET
resistor from the following equations with:
1. The maximum r
DS(ON)
at the highest junction temperature.
2. The minimum I
OCSET
from the specification table.
Determine the overcurrent trip point greater than the maximum
output continuous current at maximum inductor ripple current.
High Speed MOSFET Gate Driver
The integrated driver has the same drive capability and feature as
the Intersil’s 12V gate driver, ISL6612. The PWM tri-state feature
helps prevent a negative transient on the output voltage when the
output is being shut down. This eliminates the Schottky diode that
is used in some systems for protecting the microprocessor from
reversed output voltage damage. See the ISL6612
datasheet for
specification parameters that are not defined in the current
ISL6535 “Electrical Specifications” table on page 5
.
Reference Input
The REFIN pin allows the user to bypass the internal 0.597V
reference with an external reference. If REFIN is NOT above
~2.2V, the external reference pin is used as the control reference
instead of the internal 0.597V reference. When is not using the
external reference option, the REFIN pin should be left floating.
An internal 6
µA pull-up keeps this REFIN pin above 2.2V in this
situation.
Internal Reference and System Accuracy
The internal reference is set to 0.597V. The total DC system
accuracy of the system is to be within 1.0% over commercial
temperature range and 1.5% over the industrial temperature
range. System accuracy includes error amplifier offset and
reference error. The use of REFIN may add up to 3mV of offset
error into the system (as the error amplifier offset is trimmed out
via the internal system reference).
FIGURE 7. TYPICAL OVERCURRENT PROTECTION
V
SSDONE
V
SS
I
LOAD
t
HICCUP
I
OCP
t
HICCUP
8V C
SS
30A
------------------------
=
(EQ. 5)
R
OCSET
I
OC_SOURCE
I
2
-----
+
r
DS ON
I
HSOC
N
U
----------------------------------------------------------------------------------
=
N
U
NUMBER OF HIGH SIDE MOSFETs=
R
OCSET
I
OC_SOURCE
r
DS ON
200A
----------------------------------------------------------------
=
SIMPLE OCP EQUATION
DETAILED OCP EQUATION
I =
V
IN
- V
OUT
f
SW
L
OUT
--------------------------------
V
OUT
V
IN
----------------
f
SW
Regulator Switching Frequency=
(EQ. 6)
