DS803F1 7
CS4353
DAC ANALOG CHARACTERISTICS
Test conditions (unless otherwise specified): T
A
= 25 °C; VCP = VA = 3.3 V; AOUT_REF = AGND = DGND =
CPGND = 0 V; VBIAS, VFILT+/-, and FLYP/N+/- capacitors as shown in Figure 3 on page 12; input test signal is a
997 Hz sine wave at 0 dBFS; measurement bandwidth 10 Hz to 20 kHz.
Notes: 2. Measured at the output of the external LPF on AOUTx as shown in Figure 3 on page 12.
3. One-half LSB of triangular PDF dither is added to data.
4. Measured with the specified minimum AC-Load Resistance present on the AOUTx pins.
5. Measured between the AOUTx and AOUT_REF pins.
6. External impedance between the AOUTx pin and the load will lower the voltage delivered to the load.
7. V
PP
is the controlling specification. V
RMS
specification valid for sine wave signals only.
Note that for sine wave signals:
8. Measured with AOUT_REF connected directly to ground. External impedance between AOUT_REF
and ground will lower the AOUT_REF rejection.
1_2VRMS = 0 1_2VRMS = 1
Parameter Symbol Min Typ Max Min Typ Max Unit
Dynamic Performance, Fs = 48, 96, and 192 kHz (Notes 2, 3, 4)
Dynamic Range 24-bit A-Weighted
unweighted
16-bit A-Weighted
unweighted
94
91
-
-
100
97
92
89
-
-
-
-
100
97
-
-
106
103
98
95
-
-
-
-
dB
dB
dB
dB
Total Harmonic Distortion + Noise
24-bit 0 dB
-20 dB
-60 dB
16-bit 0 dB
-20 dB
-60 dB
THD+N
-
-
-
-
-
-
-
-93
-77
-37
-93
-75
-29
-87
-71
-31
-
-
-
-
-
-
-
-
-
-
-93
-83
-43
-93
-75
-35
-87
-77
-37
-
-
-
dB
dB
dB
dB
dB
dB
Idle Channel Noise / Signal-to-Noise Ratio (A-wt) - 100 - - 106 - dB
Interchannel Isolation (1 kHz) - 115 - - 115 - dB
Analog Output (Note 5)
Full Scale AOUTx Output Voltage (Notes 4, 6, 7) 1.021.081.132.042.152.26V
RMS
2.89 3.05 3.20 5.78 6.09 6.40 V
pp
Max Current Draw from an AOUTx Pin I
OUTmax
-575- -575- μA
Interchannel Gain Mismatch - 0.1 - - 0.1 - dB
Output Offset - ±5 ±8 - ±5 ±8 mV
Gain Drift - 100 - - 100 - ppm/°C
Output Impedance Z
OUT
-100- -100- Ω
AC-Load Resistance R
L
5--5--kΩ
Load Capacitance C
L
- - 1000 - - 1000 pF
AOUT_REF Rejection (Notes 8, 9)AOR-40- -40-dB
Analog Reference Input
AOUT_REF Input Voltage (Note 10) --0.2--0.2Vpp
VRMS
Vpp
22
----------=
8 DS803F1
CS4353
9. SDIN = 0. AOUT_REF input test signal is a 60 Hz, 50 mVpp sine wave. Measured by applying the test
signal into the AOUT_REF pin and measuring the resulting output amplitude on the AOUTx pin. Spec-
ification calculated by:
10. Applying a DC voltage on the AOUT_REF pin will cause a DC offset on the DAC output. See Section
4.1.3 for more information.
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE
The filter characteristics have been normalized to the sample rate (Fs) and can be referenced to the desired sam-
ple rate by multiplying the given characteristic by Fs.
Notes: 11. Response is clock-dependent and will scale with Fs.
12. For Single- and Double-Speed Mode, the Measurement Bandwidth is from stopband to 3 Fs.
For Quad-Speed Mode, the Measurement Bandwidth is from stopband to 1.34 Fs.
13. De-emphasis is available only in Single-Speed Mode.
14. Amplitude vs. Frequency plots of this data are available in “Digital Filter Response Plots” on page 21.
Parameter Min Typ Max Unit
Single-Speed Mode - 48 kHz
Passband (Note 11) to -0.01 dB corner
to -3 dB corner
0
0
-
-
.454
.499
Fs
Fs
Frequency Response 10 Hz to 20 kHz -0.01 - +0.01 dB
StopBand 0.547 - - Fs
StopBand Attenuation (Note 12) 102 - - dB
Total Group Delay (Fs = Sample Rate) - 9.4/Fs - s
Intra-channel Phase Deviation - - ±0.56/Fs s
Inter-channel Phase Deviation - - 0 s
De-emphasis Error (Note 13)(Relative to 1 kHz) Fs = 44.1 kHz - - ±0.14 dB
Double-Speed Mode - 96 kHz
Passband (Note 11) to -0.01 dB corner
to -3 dB corner
0
0
-
-
.430
.499
Fs
Fs
Frequency Response 10 Hz to 20 kHz -0.01 - 0.01 dB
StopBand .583 - - Fs
StopBand Attenuation (Note 12) 80 - - dB
Total Group Delay (Fs = Sample Rate) - 4.6/Fs - s
Intra-channel Phase Deviation - - ±0.03/Fs s
Inter-channel Phase Deviation - - 0 s
Quad-Speed Mode - 192 kHz
Passband (Note 11) to -0.01 dB corner
to -3 dB corner
0
0
-
-
.105
.490
Fs
Fs
Frequency Response 10 Hz to 20 kHz -0.01 - 0.01 dB
StopBand .635 - - Fs
StopBand Attenuation (Note 12) 90 - - dB
Total Group Delay (Fs = Sample Rate) - 4.7/Fs - s
High-Pass Filter Characteristics
Passband (Note 11) to -0.05 dB corner
to -3 dB corner
9.00x10
-5
9.74x10
-6
-
-
-
-
Fs
Fs
Passband Ripple - - 0.01 dB
Phase Deviation @ 20 Hz - - 1.34 Deg
Filter Settling Time (input signal goes to 95% of its final value) - 5x10
4
/Fs - s
AOR
dB
20 log
10
AOUT_REF
AOUT_REF AOUTx
---------------------------------------------------------


=
DS803F1 9
CS4353
SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE
Parameters Symbol Min Max Units
MCLK Frequency 2.048 51.2 MHz
MCLK Duty Cycle 45 55 %
Input Sample Rate (Auto selection) Single-Speed Mode
Double-Speed Mode
Quad-Speed Mode
Fs
Fs
Fs
8
84
170
54
108
216
kHz
kHz
kHz
LRCK Duty Cycle 40 60 %
SCLK Pulse Width Low t
sclkl
20 - ns
SCLK Pulse Width High t
sclkh
20 - ns
SCLK Period Single-Speed Mode - s
Double-Speed Mode - s
Quad-Speed Mode - s
SCLK rising to LRCK edge delay t
slrd
20 - ns
SCLK rising to LRCK edge setup time t
slrs
20 - ns
SDIN valid to SCLK rising setup time t
sdlrs
20 - ns
SCLK rising to SDIN hold time t
sdh
20 - ns
sclkh
t
slrs
t
slrd
t
sdlrs
t
sdh
t
sclkl
t
SDATA
SCLK
LRCK
1
128()Fs
----------------------
1
64()Fs
------------------
1
64()Fs
------------------

CS4353-CZZ

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Audio D/A Converter ICs 3.3V Stereo DAC w/ 2Vrms Line Driver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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