LTC3731
22
3731fc
APPLICATIONS INFORMATION
this recovery time, V
OUT
can be monitored for excessive
overshoot or ringing, which would indicate a stability
problem. The availability of the I
TH
pin not only allows
optimization of control loop behavior, but also provides
a DC coupled and AC filtered closed-loop response test
point. The DC step, rise time and settling at this test
point truly reflects the closed-loop response. Assuming
a predominantly second order system, phase margin and/
or damping factor can be estimated using the percentage
of overshoot seen at this pin. The bandwidth can also be
estimated by examining the rise time at the pin. The I
TH
external components shown in the Figure 1 circuit will
provide an adequate starting point for most applications.
The I
TH
series R
C
-C
C
filter sets the dominant pole-zero
loop compensation. The values can be modified slightly
(from 0.2 to 5 times their suggested values) to maximize
transient response once the final PC layout is done and
the particular output capacitor type and value have been
determined. The output capacitors need to be decided upon
because the various types and values determine the loop
feedback factor gain and phase. An output current pulse
of 20% to 80% of full load current having a rise time of
<2µs will produce output voltage and I
TH
pin waveforms
that will give a sense of the overall loop stability without
breaking the feedback loop. The initial output voltage step,
resulting from the step change in output current, may
not be within the bandwidth of the feedback loop, so this
signal cannot be used to determine phase margin. This is
why it is better to look at the I
TH
pin signal which is in the
feedback loop and is the filtered and compensated control
loop response. The gain of the loop will be increased by
increasing R
C
and the bandwidth of the loop will be in-
creased by decreasing C
C
. If R
C
is increased by the same
factor that C
C
is decreased, the zero frequency will be kept
the same, thereby keeping the phase the same in the most
critical frequency range of the feedback loop. The output
voltage settling behavior is related to the stability of the
closed-loop system and will demonstrate the actual overall
supply performance.
A second, more severe transient is caused by switching
in loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
OUT
, causing a rapid drop in V
OUT
. No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If C
LOAD
is greater
than 2% of C
OUT
, the switch rise time should be controlled
so that the load rise time is limited to approximately
1000 R
SENSE
C
LOAD
. Thus a 250µF capacitor and a 2mΩ
R
SENSE
resistor would require a 500µs rise time, limiting
the charging current to about 1A.
Automotive Considerations: Plugging into the
Cigarette Lighter
As battery-powered devices go mobile, there is a natural
interest in plugging into the cigarette lighter in order to
conserve or even recharge battery packs during operation.
But before you connect, be advised: you are plugging into
the supply from hell. The main battery line in an automobile
is the source of a number of nasty potential transients,
including load dump, reverse battery and double battery.
Load dump is the result of a loose battery cable. When the
cable breaks connection, the field collapse in the alterna-
tor can cause a positive spike as high as 60V which takes
several hundred milliseconds to decay. Reverse battery is
just what it says, while double battery is a consequence of
tow-truck operators finding that a 24V jump start cranks
cold engines faster than 12V.
The network shown in Figure 10 is the most straightforward
approach to protect a DC/DC converter from the ravages
of an automotive battery line. The series diode prevents
current from flowing during reverse battery, while the
transient suppressor clamps the input voltage during
load dump. Note that the transient suppressor should not
conduct during double-battery operation, but must still
clamp the input voltage below breakdown of the converter.
Although the IC has a maximum input voltage of 32V on
LTC3731
23
3731fc
APPLICATIONS INFORMATION
the SW pins, most applications will be limited to 30V by
the MOSFET BV
DSS
.
Design Example
As a design example, assume V
CC
= 5V, V
IN
= 12V(nominal),
V
IN
= 20V(max), V
OUT
= 1.3V, I
MAX
= 45A and f = 400kHz. The
inductance value is chosen first based upon a 30% ripple
current assumption. The highest value of ripple current in
each output stage occurs at the maximum input voltage.
L =
V
OUT
f I
( )
1
V
OUT
V
IN
=
1.3V
400kHz
( )
30%
( )
15A
( )
1
1.3V
20V
0.68µH
Using L = 0.6µH, a commonly available value results in
34% ripple current. The worst-case output ripple for the
three stages operating in parallel will be less than 11% of
the peak output current.
R
SENSE1,
R
SENSE2
and R
SENSE3
can be calculated by using
a conservative maximum sense current threshold of 65mV
and taking into account half of the ripple current:
R
SENSE
=
65mV
15A 1+
34%
2
= 0.0037
Use a commonly available 0.003Ω sense resistor.
Next verify the minimum on-time is not violated. The
minimum on-time occurs at maximum V
CC
:
t
ON MIN
( )
=
V
OUT
V
IN(MAX)
f
( )
=
1.3V
20V 400kHz
( )
= 162ns
The output voltage will be set by the resistive divider from
the DIFFOUT pin to SGND, R1 and R2 in the Functional
Diagram. Set R1 = 13.3k and R2 = 11.3k.
The power dissipation on the topside MOSFET can be
estimated. Using a Fairchild FDS6688 for example, R
DS(ON)
= 7mΩ, C
MILLER
= 15nC/15V = 1000pF. At maximum input
voltage with T(estimated) = 50°C:
P
MAIN
1.8V
20V
15
( )
2
1+ 0.005
( )
50°C 25°C
( )
0.007Ω + 20
( )
2
45A
2
( )
3
( )
2
( )
1000pF
( )
1
5V 1.8V
+
1
1.8V
400kHz
( )
= 2.2W
The worst-case power dissipation by the synchronous
MOSFET under normal operating conditions at elevated
ambient temperature and estimated 50°C junction tem-
perature rise is:
P
SYNC
=
20V 1.3V
20V
15A
( )
2
1.25
( )
0.007
( )
= 1.84W
A short-circuit to ground will result in a folded back cur-
rent of:
I
SC
25mV
2+ 3
( )
m
+
1
2
150ns 20V
( )
0.6µH
= 7.5A
with a typical value of R
DS(ON)
and d = (0.005/°C)(50°C)
= 0.25. The resulting power dissipated in the bottom
MOSFET is:
P
SYNC
= (7.5A)
2
(1.25)(0.007Ω) ≈ 0.5W
+
LTC3731
V
CC
5V
V
BAT
12V
3731 F10
Figure 10. Automotive Application Protection
LTC3731
24
3731fc
APPLICATIONS INFORMATION
which is less than one third of the normal, full load con-
ditions. Incidentally, since the load no longer dissipates
any power, total system power is decreased by over 90%.
Therefore, the system actually cools significantly during
a shorted condition!
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 11. Check the following in the
PC layout:
+
R
IN
V
IN
V
OUT
C
IN
BOLD LINES INDICATE HIGH,
SWITCHING CURRENTS.
KEEP LINES TO A MINIMUM
LENGTH.
+
C
OUT
D3
D2
SW2
D1
L1
SW1
R
SENSE1
L2
R
SENSE2
L3
SW3
R
SENSE3
3731 F11
R
L
Figure 11. Branch Current Waveforms

LTC3731CG#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 3-Phase Buck controller with PLL
Lifecycle:
New from this manufacturer.
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