REV. B
AD7663
–12–
SW
A
COMP
SW
B
IND
4R
REF
REFGND
LSB
MSB
32,768C
INGND
16,384C
4C
2C
CC
CONTROL
LOGIC
SWITCHES
CONTROL
BUSY
OUTPUT
CODE
INC
4R
INA
R
INB
2R
CNVST
65,536C
Figure 3. ADC Simplified Schematic
Table III. Output Codes and Ideal Input Voltages
Digital Output
Code (Hexa)
Straight Twos
Description Analog Input Binary Complement
Full-Scale Range
1
±10 V ±5 V ±2.5 V 0 V to 10 V 0 V to 5 V 0 V to 2.5 V
Least Significant Bit 305.2 µV 152.6 µV 76.3 µV 152.6 µV 76.3 µV 38.15 µV
FSR 1 LSB 9.999695 V 4.999847 V 2.499924 V 9.999847 V 4.999924 V 2.499962 V FFFF
2
7FFF
2
Midscale + 1 LSB 305.2 µV 152.6 µV 76.3 µV 5.000153 V 2.570076 V 1.257038 V 8001 0001
Midscale 0 V 0 V 0 V 5 V 2.5 V 1.25 V 8000 0000
Midscale 1 LSB 305.2 µV 152.6 µV 76.3 µV 4.999847 V 2.499924 V 1.249962 V 7FFF FFFF
FSR + 1 LSB 9.999695 V 4.999847 V 2.499924 V 152.6 µV 76.3 µV 38.15 µV 0001 8001
FSR 10 V 5 V 2.5 V 0 V 0 V 0 V 0000
3
8000
3
NOTES
1
Values with REF = 2.5 V, with REF = 3 V, all values will scale linearly.
2
This is also the code for an overrange analog input.
3
This is also the code for an underrange analog input.
000...000
000...001
000...010
111...101
111...110
111...111
ADC CODE – Straight Binary
ANALOG INPUT
+FS – 1.5 LSB
+FS – 1 LSB
–FS + 1 LSB–FS
–FS + 0.5 LSB
Figure 4. ADC Ideal Transfer Function
Transfer Functions
Using the OB/2C digital input, the AD7663 offers two output
codings: straight binary and twos complement. The ideal transfer
characteristic for the AD7663 is shown in Figure 4 and Table III.
TYPICAL CONNECTION DIAGRAM
Figure 5 shows a typical connection diagram for the AD7663.
Different circuitry shown on this diagram is optional and is
discussed in the figures notes.
Analog Inputs
The AD7663 is specified to operate with six full-scale analog
input ranges. Connections required for each of the four analog
inputs, IND, INC, INB, and INA, and the resulting full-scale
ranges are shown in Table I. The typical input impedance for
each analog input range is also shown.
REV. B
AD7663
–13–
100nF10F
100nF 10F
AVDD
10F 100nF
AGND DGND DVDD OVDD OGND
SER/PAR
CNVST
BUSY
SDOUT
SCLK
RD
CS
RESET
PD
REFGND
C
REF
2.5V REF
REF
100
D
CLOCK
AD7663
C/P/DSP
SERIAL
PORT
DIGITAL SUPPLY
(3.3V OR 5V)
ANALOG
SUPPLY
(5V)
DVDD
OB/2C
NOTE 8
BYTESWAP
DVDD
50k
100nF
1M
INA
100nF
U2
IND
INGND
ANALOG
INPUT
(10V)
C
C
2.7nF
U1
15
10F
NOTE 2
NOTE 1
NOTE 3
NOTE 7
NOTE 4
50
INC
INB
NOTE
6
NOTES
1. SEE VOLTAGE REFERENCE INPUT SECTION.
2. WITH THE RECOMMENDED VOLTAGE REFERENCES, C
REF
IS 47F. SEE VOLTAGE REFERENCE INPUT SECTION.
3. OPTIONAL CIRCUITRY FOR HARDWARE GAIN CALIBRATION.
4. FOR BIPOLAR RANGE ONLY. SEE SCALER REFERENCE INPUT SECTION.
5. THE AD8021 IS RECOMMENDED. SEE DRIVER AMPLIFIER CHOICE SECTION.
6. WITH 0V TO 2.5V RANGE ONLY. SEE ANALOG INPUTS SECTION.
7. OPTION. SEE POWER SUPPLY SECTION.
8. OPTIONAL LOW JITTER CNVST. SEE CONVERSION CONTROL SECTION.
+
+
+
++
+
+
AD8031
AD8021
50
ADR421
NOTE 5
Figure 5. Typical Connection Diagram (±10 V Range Shown)
Figure 6 shows a simplified analog input section of the AD7663.
INC
INB
INA
4R
2R
R
IND
4R
AGND
AVDD
R1
C
S
R = 1.28k
Figure 6. Simplified Analog Input
The four resistors connected to the four analog inputs form a resis-
tive scaler that scales down and shifts the analog input range to a
common input range of 0 V to 2.5 V at the input of the switched
capacitive ADC.
By connecting the four inputs INA, INB, INC, and IND to the
input signal itself, the ground, or a 2.5 V reference, other analog
input ranges can be obtained.
The diodes shown in Figure 6 provide ESD protection for the four
analog inputs. The inputs INB, INC, and IND have a high voltage
protection (11 V to +30 V) to allow wide input voltage range.
Care must be taken to ensure that the analog input signal never
exceeds the absolute ratings on these inputs, including INA
(0 V to 5 V). This will cause these diodes to become forward-
biased and start conducting current. These diodes can handle a
forward-biased current of 120 mA maximum. For instance, when
using the 0 V to 2.5 V input range, these conditions could even-
tually occur on the input INA when the input buffers (U1) supplies
are different from AVDD. In such cases, an input buffer with a
short-circuit current limitation can be used to protect the part.
This analog input structure allows the sampling of the differential
signal between the output of the resistive scaler and INGND. Unlike
other converters, the INGND input is sampled at the same time as
the inputs. By using this differential input, small signals common
to both inputs are rejected as shown in Figure 7, which represents
the typical CMRR over frequency. For instance, by using INGND
to sense a remote signal ground, the difference of ground potentials
between the sensor and the local ADC ground is eliminated.
REV. B
AD7663
–14–
75
70
65
60
55
50
45
40
35
0 10 100 1000
CMRR – dB
FREQUENCY – kHz
Figure 7. Analog Input CMRR vs. Frequency
During the acquisition phase for ac signals, the AD7663 behaves
like a one-pole RC filter consisting of the equivalent resistance of
the resistive scaler R/2 in series with R1 and C
S
. The resistor R1
is typically 2700 W and is a lumped component made up of some
serial resistors and the on-resistance of the switches. The capacitor
C
S
is typically 60 pF and is mainly the ADC sampling capacitor.
This one-pole filter with a typical 3 dB cutoff frequency of
800 kHz reduces undesirable aliasing effects and limits the noise
coming from the inputs.
Except when using the 0 V to 2.5 V analog input voltage range,
the AD7663 has to be driven by a very low impedance source to
avoid gain errors. That can be done by using a driver amplifier
whose choice is eased by the primarily resistive analog input
circuitry of the AD7663.
When using the 0 V to 2.5 V analog input voltage range, the input
impedance of the AD7663 is very high so the AD7663 can be
driven directly by a low impedance source without gain error.
That allows, as shown in Figure 5, putting an external one-pole
RC filter between the output of the amplifier output and the ADC
analog inputs to even further improve the noise filtering by the
AD7663 analog input circuit. However, the source impedance
has to be kept low because it affects the ac performances, especially
the total harmonic distortion (THD). The maximum source
impedance depends on the amount of THD that can be tolerated.
The THD degradation is a function of the source impedance
and the maximum input frequency as shown in Figure 8.
FREQUENCY – kHz
–70
10
THD
100 1000
–80
–90
–100
–110
R = 100
R = 11
R = 50
Figure 8. THD vs. Analog Input Frequency and Input
Resistance (0 V to 2.5 V Only)
Driver Amplifier Choice
Although the AD7663 is easy to drive, the driver amplifier needs
to meet at least the following requirements:
The driver amplifier and the AD7663 analog input circuit
have to be able, together, to settle for a full-scale step of the
capacitor array at a 16-bit level (0.0015%). In the amplifiers
data sheet, the settling at 0.1% to 0.01% is more commonly
specified. It could significantly differ from the settling time at
16-bit level and, therefore, it should be verified prior to the
driver selection. The tiny op amp AD8021, which combines
ultralow noise and a high gain bandwidth, meets this settling
time requirement even when used with a high gain up to 13.
The noise generated by the driver amplifier needs to be kept
as low as possible in order to preserve the SNR and transition
noise performance of the AD7663. The noise coming from
the driver is first scaled down by the resistive scaler according
to the analog input voltage range used, and is then filtered by
the AD7663 analog input circuit one-pole, low-pass filter
made by (R/2 + R1) and C
S
. The SNR degradation due to
the amplifier is
SNR
f
Ne
FSR
LOSS
dB
N
=
+
Ê
Ë
Á
ˆ
¯
˜
Ê
Ë
Á
Á
Á
Á
Á
ˆ
¯
˜
˜
˜
˜
˜
20
28
784
2
25
3
2
log
.
p
where:
f
3 dB
is the 3 dB input bandwidth in MHz of the AD7663
(0.8 MHz) or the cut-off frequency of the input filter
if any used (0 V to 2.5 V range).
N is the noise factor of the amplifier (1 if in buffer
configuration).
e
N
is the equivalent input noise voltage of the op amp
in nV/Hz
1/2
.
FSR is the full-scale span (i.e., 5 V for ±2.5 V range).
For instance, when using the 0 V to 2.5 V range, a driver
like the AD8610 with an equivalent input noise of 6 nV/÷Hz
and configured as a buffer, thus with a noise gain of 1, the
SNR degrades by only 0.24 dB.
The driver needs to have a THD performance suitable to
that of the AD7663. TPC 10 gives the THD versus frequency
that the driver should preferably exceed.
The AD8021 meets these requirements and is usually appropri-
ate for almost all applications. The AD8021 needs an external
compensation capacitor of 10 pF. This capacitor should have good
linearity as an NPO ceramic or mica type.
The AD8022 could also be used where a dual version is needed
and gain of 1 is used.
The AD829 is another alternative where high frequency (above
100 kHz) performance is not required. In a gain of 1, it requires
an 82 pF compensation capacitor.
The AD8610 is also another option where low bias current is
needed in low frequency applications.

AD7663ASTZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 16-Bit Bipolar 250kSPS CMOS
Lifecycle:
New from this manufacturer.
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