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CAT140029TWI-G

P1-P3P4-P6P7-P9P10-P11
© Semiconductor Components Industries, LLC, 2011
November, 2011 − Rev. 3
1 Publication Order Number:
CAT14002/D
CAT140xx
Voltage Supervisor with I
2
C
Serial CMOS EEPROM
Description
The CAT140xx (see table below) are memory and supervisory
solutions for microcontroller based systems. A CMOS serial
EEPROM memory and a system power supervisor with brown−out
protection are integrated together. Memory interface is via both the
standard (100 kHz) as well as fast (400 kHz) I
2
C protocol.
The CAT140xx provides a precision V
CC
sense circuit with two
reset output options: CMOS active low output or CMOS active high.
The RESET output is active whenever V
CC
is below the reset
threshold or falls below the reset threshold voltage.
The power supply monitor and reset circuit protect system
controllers during power up/down and against brownout conditions.
Seven reset threshold voltages support 5 V, 3.3 V, 3 V and 2.5 V
systems. If power supply voltages are out of tolerance reset signals
become active, preventing the system microcontroller, ASIC or
peripherals from operating. Reset signals become inactive typically
240 ms after the supply voltage exceeds the reset threshold level.
Features
• Precision Power Supply Voltage Monitor
♦ 5 V, 3.3 V, 3 V and 2.5 V Systems
♦ 7 Threshold Voltage Options
• Active High or Low Reset
♦ Valid Reset Guaranteed at V
CC
= 1 V
• Supports Standard and Fast I
2
C Protocol
• 16−Byte Page Write Buffer
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• Industrial Temperature Range
• RoHS−Compliant 8−Pin SOIC Package
• These Devices are Pb−Free, Halogen Free/BFR Free
and are RoHS Compliant
THRESHOLD SUFFIX SELECTOR
Nominal Threshold Voltage Threshold Suffix
Designation
4.63 V L
4.38 V M
4.00 V J
3.08 V T
2.93 V S
2.63 V R
2.32 V Z
ORDERING INFORMATION
http://onsemi.com
SOIC−8
CASE 751BD
For Ordering Information details, see page 10.
1
2
3
4
8
7
6
5
NC / NC / NC / A
0
NC / NC / A
1
/ A
1
NC / A
2
/ A
2
/ A
2
V
SS
V
CC
RST/RST
SCL
SDA
PIN CONFIGURATION
PIN FUNCTION
Pin Name Function
A0, A1, A2 Device Address Inputs
SDA Serial Data Input/Output
SCL Serial Clock Input
RST/RST
Reset Output
V
CC
Power Supply
V
SS
Ground
NC No Connect
SOIC (W)
MEMORY SIZE SELECTOR
Product Memory Density
14002 2−Kbit
14004 4−Kbit
14008 8−Kbit
14016 16−Kbit
CAT
14016 / 08 / 04 / 02
CAT140xx
http://onsemi.com
2
BLOCK DIAGRAM
SDA
EEPROM
SCL
A0
A1
A2
V
CC
VOLTAGE
DETECTOR
RST or RST
V
SS
SPECIFICATIONS
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameters Ratings Units
Storage Temperature –65 to +150 °C
Voltage on Any Pin with Respect to Ground (Note 1) −0.5 to +6.5 V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The DC input voltage on any pin should not be lower than −0.5 V or higher than V
CC
+ 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than −1.5 V or overshoot to no more than V
CC
+ 1.5 V, for periods of less than 20 ns.
Table 2. RELIABILITY CHARACTERISTICS (Note 2)
Symbol Parameter Min Units
NEND (Note 3) Endurance 1,000,000 Program/ Erase Cycles
TDR Data Retention 100 Years
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
and JEDEC test methods.
3. Page Mode, V
CC
= 5 V, 25°C
Table 3. D.C. OPERATING CHARACTERISTICS
V
CC
= +2.5 V to +5.5 V, unless otherwise specified.
Symbol
Parameter Test Conditions Min Typ Max Units
I
CC
Supply Current Read or Write at 400 kHz 1 mA
I
SB
Standby Current
V
CC
< 5.5 V; All I/O Pins at V
SS
or V
CC
10 22 mA
V
CC
< 3.6 V; All I/O Pins at V
SS
or V
CC
8 17
I
L
I/O Pin Leakage Pin at GND or V
CC
2
mA
V
IL
Input Low Voltage −0.5 V
CC
x 0.3 V
V
IH
Input High Voltage V
CC
x 0.7 V
CC
+ 0.5 V
V
OL
Output Low Voltage
SDA
V
CC
≥ 2.5 V, I
OL
= 3.0 mA 0.4 V
CAT140xx
http://onsemi.com
3
Table 4. A.C. CHARACTERISTICS (MEMORY) (Note 1)
V
CC
= 2.5 V to 5.5 V, T
A
= −40°C to 85°C, unless otherwise specified.
Symbol
Parameter
Standard Fast
Units
Min Max Min Max
F
SCL
Clock Frequency 100 400 kHz
t
HD:STA
START Condition Hold Time 4 0.6
ms
t
LOW
Low Period of SCL Clock 4.7 1.3
ms
t
HIGH
High Period of SCL Clock 4 0.6
ms
t
SU:STA
START Condition Setup Time 4.7 0.6
ms
t
HD:DAT
Data in Hold Time 0 0
ms
t
SU:DAT
Data in Setup Time 250 100 ns
t
R
(Note 2) SDA and SCL Rise Time 1000 300 ns
t
F
(Note 2) SDA and SCL Fall Time 300 300 ns
t
SU:STO
STOP Condition Setup Time 4 0.6
ms
t
BUF
Bus Free Time Between STOP and START 4.7 1.3
ms
t
AA
SCL Low to Data Out Valid 3.5 0.9
ms
t
DH
Data Out Hold Time 100 100 ns
T
I
(Note 2) Noise Pulse Filtered at SCL and SDA Inputs 100 100 ns
t
WR
Write Cycle Time 5 5 ms
t
PU
(Notes 2 & 3)
Power−up to Ready Mode 1 1 ms
1. Test conditions according to “A.C. Test Conditions” table.
2. Tested initially and after a design or process change that affects this parameter.
3. t
PU
is the delay between the time V
CC
is stable and the device is ready to accept commands.
Table 5. A.C. TEST CONDITIONS
Parameter Test Conditions
Input Levels 0.2 x V
CC
to 0.8 x V
CC
Input Rise and Fall Times ≤50 ns
Input Reference Levels 0.3 x V
CC
, 0.7 x V
CC
Output Reference Levels 0.5 x V
CC
Output Load Current Source: I
OL
= 3 mA; C
L
= 100 pF
P1-P3P4-P6P7-P9P10-P11

CAT140029TWI-G

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Buy CAT140029TWI-G
Manufacturer:
ON Semiconductor
Description:
Supervisory Circuits w/2k I2C
Lifecycle:
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