LTC2941
9
2941fb
For more information www.linear.com/LTC2941
applicaTions inFormaTion
Bit A[5] is set if the LTC2941’s accumulated charge over-
flows or underflows the combined total in registers C and D.
Note that the counting process does not roll over, but simply
stops at FFFFh or 0000h until the direction is reversed.
The LTC2941 includes a battery undervoltage monitor,
which sets bit A1 if the limit is exceeded. Limits are selected
in the control register.
The undervoltage lockout (UVLO) bit A[0] is set if, dur
-
ing operation, the voltage on SENSE
+
drops below 2.7V
without reaching the POR level. The analog parts of the
coulomb counter are switched off while the digital register
values are retained. After recovery of the supply voltage
the coulomb counter resumes integrating with the stored
value in the accumulated charge registers (C, D) but it has
missed any charge flowing while V
SENSE
+
< 2.7V.
The hard coded bit A[7] of the status register enables the
host to distinguish the LTC2941 from the pin compatible
LTC2942, allowing the same software to be used with
both devices.
Control Register (B)
The operation of the LTC2941 can be controlled by pro
-
gramming the control register at address 01h. Table 3
shows the organization of the 8-bit control register B[7:0]
Table 3. Control Register B
BIT NAME OPERATION DEFAULT
B[7:6] V
BAT
Alert [11] Threshold Value = 3.0V.
[10] Threshold Value = 2.9V.
[01] Threshold Value = 2.8V.
[00] V
BAT
Alert Off.
[00]
B[5:3] Prescaler M Sets coulomb counter prescaling
factor M between 1 and 128.
Default is 128.
M = 2
(4 • B[5] + 2 • B[4] + B[3])
.
[111]
B[2:1] AL/CC
Configure
Configures the AL/CC pin.
[10] Alert Mode.
Alert functionality enabled.
Pin becomes logic output.
[01] Charge Complete Mode.
Pin becomes logic input and accepts
“charge complete” signal (e.g., from
a charger) to set accumulated charge
Register to FFFFh.
[00] AL
/CC pin disabled.
[11] Not allowed.
[10]
B[0] Shutdown Shut down analog section to reduce
I
SUPPLY
.
[0]
Power Down B[0]
Programming the last bit B[0] of the control register to 1
sets the analog parts of the LTC2941 in power down and
the current consumption drops typically below 1µA. All
analog circuits are disabled while the values in the registers
are retained. Note that any charge flowing while B[0] is 1
is not measured and the charge information below 1 LSB
of the accumulated charge register is lost.
Alert/Charge Complete Configuration B[2:1]
The AL/CC pin is a dual function pin configured by the
control register. By setting bits B[2:1] to [10] (default)
the AL/CC pin is configured as an alert pin following the
SMBus protocol. In this alert mode the AL/CC pin is a digital
output and is pulled low if one of the measured quantities
exceeds its high or low threshold or if the an overflow/
underflow occurs in the accumulated charge registers C
and D. An alert response procedure started by the master
resets the alert at the AL/CC pin. For further information
see the Alert Response Protocol section.
Setting the control bits B[2:1] to [01] configures the AL/
CC pin as a digital input. In this mode, a high input on the
AL/CC pin communicates to the LTC2941 that the battery
is full and the accumulated charge is set to its maximum
value FFFFh. The AL/CC pin would typically be connected
to the “charge complete” output from the battery charger
circuitry.
If neither the alert nor the charge complete functionality
is desired, bits B[2:1] should be set to [00]. The AL/CC
pin is then disabled and should be tied to GND. Avoid set
-
ting B[2:1] to [11] as it enables the alert and the charge
complete modes simultaneously
.
Choosing R
SENSE
and Coulomb Counter
Prescaler “M” B[5:3]
To achieve the specified precision of the coulomb counter
the differential voltage between SENSE
+
and SENSE
–
must
stay within ±50mV. For differential input signals up to
±300mV the LTC2941 will remain functional but the preci
-
sion of the coulomb counter is not guaranteed.
