MAX6952EAX+ Datasheet MAX6952EAX+, MAX6952EPL+, MAX6952EAX+T | P10-P12

MAX6952

4-Wire Interfaced, 2.7V to 5.5V,

4-Digit 5

7 Matrix LED Display Driver

10 ______________________________________________________________________________________

Shutdown Mode (S Data Bit D0) Format

The S bit in the configuration register selects shutdown

or normal operation (Table 7). The display driver can be

programmed while in shutdown mode, and shutdown

mode is overridden when in display test mode. For nor-

mal operation, the S bit should be set to 1.

Blink Rate Selection (B Data Bit D2) Format

The B bit in the configuration register selects the blink

rate. This is the speed that the segments alternate

between plane P0 and plane P1 refresh data. The blink

rate is determined by the frequency of the multiplex clock

OSC, in addition to the setting of the B bit (Table 8).

Global Blink Enable/Disable

(E Data Bit D3) Format

The E bit globally enables or disables the blink feature

of the device (Table 9). When blink is globally enabled,

then the digit data in both planes P0 and P1 are used

to control the display (Table 10).

ADDRESS

CODE (HEX)

D7 D6 D5 D4 D3 D2 D1 D0

Intensity10 1/16 (min on) 0x01 00000000

Intensity32 1/16 (min on) 0x02 00000000

Scan Limit Display 4 digits: 0 1 2 3 0x03 XXXXXXX1

Configuration

Shutdown enabled,

blink speed is slow,

blink disabled

0x04 0 X 0000X0

User-Defined Font

Address Pointer

Address 0x80; pointing to

the first user-defined font

location

0x05 10000000

Display Test Normal operation 0x07 XXXXXXX0

Digit 0 Plane P0 Blank digit (0x20) 0x20 00100000

Digit 1 Plane P0 Blank digit (0x20) 0x21 00100000

Digit 2 Plane P0 Blank digit (0x20) 0x22 00100000

Digit 3 Plane P0 Blank digit (0x20) 0x23 00100000

Digit 0 Plane P1 Blank digit (0x20) 0x40 00100000

Digit 1 Plane P1 Blank digit (0x20) 0x41 00100000

Digit 2 Plane P1 Blank digit (0x20) 0x42 00100000

Digit 3 Plane P1 Blank digit (0x20) 0x43 00100000

Table 5. Initial Power-Up Register Status

D7 D6 D5 D4 D3 D2 D1 D0

Configuration

PXRTEBXS

Table 6. Configuration Register Format

MODE

D7 D6 D5 D4 D3 D2 D1 D0

Shutdown

Mode

PXRTEBX0

Normal

Operation

PXRTEBX1

Table 7. Shutdown Control (S Data Bit D0)

Format

MAX6952

4-Wire Interfaced, 2.7V to 5.5V,

4-Digit 5

7 Matrix LED Display Driver

______________________________________________________________________________________ 11

MAX6952

DOUT

MICROCONTROLLER

CLK

DIN

MAX6952

CLK

DIN

DOUT

CLK

DIN

DOUT

CLK

DIN

DOUT

Figure 6. MAX6952 Daisy-Chain Connection

MODE

D7 D6 D5 D4 D3 D2 D1 D0

Slow blinking (Segments are refreshed using plane P0 for 1s, plane P1

for 1s, for OSC = 4MHz.

)

PXRTE0XS

Table 8. Blink Rate Selection (B Data Bit D2) Format

MODE

D7 D6 D5 D4 D3 D2 D1 D0

Blink function is disabled. P X R T 0 B X S

Blink function is enabled. P X R T 1 B X S

Table 9. Global Blink Enable/Disable (E Data Bit D3) Format

When blink is globally disabled, then only the digit data

in plane P0 is used to control the display. The digit data

in plane P1 is ignored.

Global Blink Timing Synchronization

(T Data Bit D4) Format

By setting the T bit in multiple MAX6952s at the same

time (or in quick succession), the blink timing can be

synchronized across all the devices (Table 11). Note

that the display multiplexing sequence is also reset,

which might give rise to a one-time display flicker when

the register is written.

Global Clear Digit Data (R Data Bit D5) Format

When global digit data clear is set, the digit data for both

planes P0 and P1 for all digits is cleared (Table 12).

Blink Phase Readback (P Data Bit D7) Format

When the configuration register is read, the P bit

reflects the state of the blink output pin at that time

(Table 13).

Character Generator Font Mapping

The font is a 5

7 matrix comprising 104 characters in

ROM, and 24 user-definable characters. The selection

from the total of 128 characters is represented by the

lower 7 bits of the 8-bit digit registers. The most-signifi-

cant bit, shown as x in the ROM map below, is zero to

light LEDs as shown by the black segments in Table

14, and 1 to display the inverse.

The character map follows the Arial font for 96 charac-

ters in the x0101000 through x1111111 range. The first

MAX6952

4-Wire Interfaced, 2.7V to 5.5V,

4-Digit 5

7 Matrix LED Display Driver

12 ______________________________________________________________________________________

32 characters map the 24 user-definable positions

(RAM00 to RAM23), plus eight extra common charac-

ters in ROM.

User-Defined Fonts

The 24 user-definable characters are represented by

120 entries of 7-bit data, five entries per character, and

are stored in the MAX6952's internal RAM.

The 120 user-definable font data entries are written and

read through a single register, address 0x05. An

autoincrementing font address pointer in the MAX6952

indirectly accesses the font data. The font address

pointer can be written, setting one of 120 addresses

between 0x00 and 0xF7, but cannot be read back. The

font data is written to and read from the MAX6952 indi-

rectly, using this font address pointer. Unused font

locations can be used as general-purpose scratch

RAM, bearing in mind that the font registers are only 7

bits wide, not 8.

Table 15 shows how the single user-defined font regis-

ter 0x05 is used to set the font address pointer, write

font data, and read font data. A read action always

returns font data from the font address pointer position.

A write action sets the 7-bit font address pointer if the

MSB is set, or writes 7-bit font data to the font address

pointer position if the MSB is clear.

The font address pointer autoincrements after a valid

access to the user-definable font data. Auto-

incrementing allows the 120 font data entries to be writ-

ten and read back very quickly because the font point-

er address need only be set once. When the last data

location 0xF7 is written, the font address pointer autoin-

crements to address 0x80. If the font address pointer is

set to an out-of-range address by writing data in the

0xF8 to 0xFF range, then address 0x80 is set instead

(Table 16).

Table 17 shows the user-definable font pointer base

addresses.

SEGMENT’S

BIT SETTING

IN PLANE P1

SEGMENT’S

BIT SETTING

IN PLANE P0

SEGMENT

BEHAVIOR

0 0 Segment off

Segment on only during

the 1st half of each blink

period

Segment on only during

the 2nd half of each

blink period

1 1 Segment on

Table 10. Digit Register Mapping with

Blink Globally Enabled

MODE

D7 D6 D5 D4 D3 D2 D1 D0

Blink timing counters are unaffected. P X R 0 E B X S

Blink timing counters are reset on the rising edge of CS.PXR1EBXS

Table 11. Global Blink Timing Synchronization (T Data Bit D4) Format

MODE

D7 D6 D5 D4 D3 D2 D1 D0

Digit data for both planes P0 and P1 are unaffected. P X 0 T E B X S

Digit data for both planes P0 and P1 are cleared on the

rising edge of CS.

PX1TEBXS

Table 12. Global Clear Digit Data (R Data Bit D5) Format

MODE

D7 D6 D5 D4 D3 D2 D1 D0

P1 Blink Phase 0 X R T E B X S

P0 Blink Phase 1 X R T E B X S

Table 13. Blink Phase Readback (P Data Bit D7) Format

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21

MAX6952EAX+

Mfr. #:

Buy MAX6952EAX+

Manufacturer:

Maxim Integrated

Description:

LED Display Drivers 2.7-5.5V 4-Digit 5x7 Matrix LED Driver

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MAX6952EAX+

MAX6952EAX+

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