24VL025T/MNY Datasheet 24VL025T/ST, 24VL024/P, 24VL025/P | P1-P3

24VL024/24VL025

Device Selection Table

Features:

• Single-Supply with Operation down to 1.5V

• Low-Power CMOS Technology:

- 400 μA active current, maximum

-1 μA standby current, maximum

• 2-Wire Serial Interface Bus, I

C™ Compatible

• Schmitt Trigger Inputs for Noise Suppression

• Output Slope Control to Eliminate Ground Bounce

• 100 kHz and 400 kHz Compatibility

• Page Write Buffer for up to 16 Bytes

• Self-Timed Write Cycle (including Auto-Erase)

• Hardware Write Protection for the Entire Array

(24VL024 only)

• Cascadable up to Eight Devices

• More than 1 Million Erase/Write Cycles

• ESD Protection > 4,000V

• Data Retention > 200 Years

• Factory Programming (QTP) Available

• 8-pin PDIP, SOIC, TSSOP, TDFN and MSOP

Packages

• 6-lead SOT-23 package (24VL025 only)

• Temperature Range:

• Pb-Free and RoHS Compliant

Description:

The Microchip Technology Inc. 24VL024/24VL025 is a

2 Kbit Serial Electrically Erasable PROM with

operation down to 1.5V. The device is organized as a

single block of 256 x 8-bit memory with a 2-wire serial

interface. Low-current design permits operation with

maximum standby and active currents of only 1 μA and

400 μA, respectively. The device has a page write

capability for up to 16 bytes of data. Functional address

lines allow the connection of up to eight 24VL024/

24VL025 devices on the same bus for up to 16 Kbits of

contiguous EEPROM memory. The device is

available in the standard 8-pin PDIP, 8-pin SOIC (150

mil), TSSOP, 2x3 TDFN and MSOP packages. The

24VL025 is also available in the 6-lead, SOT-23

package.

Block Diagram

Package Types

Part Number VCC Range Max Clock

24VL024 1.5 to 3.6V 400 kHz

(1)

24VL025 1.5 to 3.6V 400 kHz

(1)

Note 1: 100 kHz for VCC < 1.8V

- -20°C to +85°C

I/O

Control

Logic

Memory

Control

Logic

XDEC

HV Generator

EEPROM

Array

Write-Protect

Circuitry

YDEC

VSS

Sense Amp.

R/W Control

SDA

SCL

A0 A1 A2

VCC

SCL

SDA

PDIP, MSOP

SOIC, TSSOP

SCL

SDA

TDFN

SCL

SDA

Note: WP pin is not internally connected on the 24VL025

SCL

SDA

SOT-23

(24VL025 only)

2K I

™

Serial EEPROM

24VL024/24VL025

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

(†)

VCC.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. V

SS ......................................................................................................... -0.6V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied..................................................................................................-20°C to +85°C

ESD protection on all pins ......................................................................................................................................................≥ 4 kV

TABLE 1-1: DC CHARACTERISTICS

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

DC CHARACTERISTICS

Electrical Characteristics:

CC = +1.5V to 3.6V TA = -20°C to +85°C

Param.

No.

Sym. Characteristic Min. Max. Units Conditions

D1 — A0, A1, A2, SCL, SDA

and WP pins:

————

D2 V

IH High-level input voltage 0.7 VCC —V—

D3 V

IL Low-level input voltage — 0.3 VCC V—

D4 VHYS Hysteresis of Schmitt

Trigger inputs

(SDA, SCL pins)

0.05 VCC —V(Note)

D5 VOL Low-level output voltage — 0.40 V IOL = 3.0 mA @ VCC = 3.6V

OL = 2.1 mA @ VCC = 2.5V

D6 I

LI Input leakage current — ±1 μAVIN = VSS or VCC, WP = VSS

D7 ILO Output leakage current — ±1 μAVOUT = VSS or VCC

D8 CIN,

OUT

Pin capacitance

(all inputs/outputs)

—10pFVCC = 3.6V (Note)

A = 25°C, f = 1 MHz

D9 ICC Read Operating current — 400 μAVCC = 3.6V, SCL = 400 kHz

ICC Write — 3 mA VCC = 3.6V

D10 I

CCS Standby current — 1 μAVCC = 3.6V, SCL = SDA = VCC

WP = VSS, A0, A1, A2 = VSS

Note: This parameter is periodically sampled and not 100% tested.

24VL024/24VL025

TABLE 1-2: AC CHARACTERISTICS

AC CHARACTERISTICS

Electrical Characteristics:

CC = +1.5V to 3.6V TA = -20°C to +85°C

Param.

No.

Symbol Characteristic Min. Max. Units Conditions

CLK Clock frequency —

—

100

400

kHz 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

2THIGH Clock high time 4000

600

—

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

LOW Clock low time 4700

1300

—

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

4TR SDA and SCL rise time

(Note 1)

—

1000

300

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

5TF SDA and SCL fall time

(Note 1)

—

1000

300

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

HD:STA Start condition hold time 4000

600

—

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

7TSU:STA Start condition setup time 4700

600

—

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

8THD:DAT Data input hold time 0 — ns (Note 2)

9TSU:DAT Data input setup time 250

100

—

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

10 TSU:STO Stop condition setup time 4000

600

—

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

11 T

SU:WP WP setup time (Note 5) 4000

600

—

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

12 THD:WP WP hold time (Note 5) 4700

600

—

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

13 TAA Output valid from clock

(Note 2)

—

3500

900

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

14 T

BUF

Bus free time: Time the bus must

be free before a new transmis-

sion can start

4700

1300

—

ns 1.5V ≤ VCC < 1.8V

1.8V ≤ V

CC ≤ 3.6V

15 T

SP Input filter spike suppression

(SDA and SCL pins)

—50ns(Note 1 and Note 3)

16 T

WC Write cycle time (byte or page) — 5 ms —

17 — Endurance 1M — cycles 25°C, V

CC = 3.6V, per page

(Note 4)

Note 1: Not 100% tested. C

B = total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: The combined T

SP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved

noise spike suppression. This eliminates the need for a T

I specification for standard operation.

4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific appli-

cation, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at

www.microchip.com.

5: 24VL024 only.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30

24VL025T/MNY

Mfr. #:

Buy 24VL025T/MNY

Manufacturer:

Microchip Technology

Description:

EEPROM 2K 256 X 8 SERIAL EE 1.5V

Lifecycle:

New from this manufacturer.

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24VL025T/MNY

24VL025T/MNY

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