© 2009 Microchip Technology Inc. DS22130A-page 11
24VL024/24VL025
8.0 READ OPERATIONS
Read operations are initiated in the same way as write
operations, with the exception that the R/W
bit of the
slave address is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
8.1 Current Address Read
The 24VL024/24VL025 contains an address
counter that maintains the address of the last word
accessed, internally incremented by one. Therefore, if
the previous read access was to address n, the next
current address read operation would access data from
address n + 1. Upon receipt of the slave address with
the R/W
bit set to ‘1’, the 24VL024/24VL025 issues an
acknowledge and transmits the 8-bit data word. The
master will not acknowledge the transfer, but does
generate a Stop condition and the 24VL024/24VL025
discontinues transmission (Figure 8-1).
8.2 Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is done by sending the word address to the
24VL024/24VL025 as part of a write operation.
Once the word address is sent, the master generates a
Start condition following the acknowledge. This
terminates the write operation, but not before the
internal Address Pointer is set. The master then issues
the control byte again but with the R/W
bit set to a ‘1’.
The 24VL024/24VL025 will then issue an
acknowledge and transmits the eight-bit data word.
The master will not acknowledge the transfer, but does
generate a Stop condition and the 24VL024/24VL025
discontinues transmission (Figure 8-2). After this
command, the internal address counter will point to the
address location following the one that was just read.
8.3 Sequential Read
Sequential reads are initiated in the same way as a
random read except that after the 24VL024/24VL025
transmits the first data byte, the master issues an
acknowledge as opposed to a Stop condition in a
random read. This directs the 24VL024 to transmit the
next sequentially addressed 8-bit word (Figure 8-3).
To provide sequential reads, the 24VL024/24VL025
contains an internal Address Pointer which is
incremented by one at the completion of each
operation. This Address Pointer allows the entire
memory contents to be serially read during one
operation. The internal Address Pointer will
automatically roll over from address FFh to address
00h.
FIGURE 8-1: CURRENT ADDRESS READ
Bus Activity
Master
SDA Line
Bus Activity
P
S
S
T
O
P
Control
Byte
S
T
A
R
T
Data
A
C
K
N
O
A
C
K
