16
Figure 11. Propagation delay time vs. temperature.
Figure 8. Propagation delay time vs. temperature.
Figure 10. Propagation delay time vs. load
resistance.
Figure 9. Propagation delay time vs. load resis-
tance.
T
A
– TEMPERATURE – °C
t
p
– PROPAGATION DELAY – µs
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
-40 -20 020406080 100
120
-60
HCPL-4504 fig 8a
V
CC
= 5.0 V
R
L
= 1.9 k
C
L
= 15 pF
V
THHL
t
PLH
t
PHL
I
F
= 10 mA
I
F
= 16 mA
= V
THLH
= 1.5 V
10% DUTY CYCLE
HCPL-4504/0454
T
A
– TEMPERATURE – °C
t
p
– PROPAGATION DELAY – µs
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
-40 -20 020406080 100
120
-60
HCPL-4504 fig 8b
V
CC
= 5.0 V
R
L
= 1.9 k
C
L
= 15 pF
V
THHL
t
PLH
t
PHL
I
F
= 10 mA
I
F
= 16 mA
= V
THLH
= 1.5 V
10% DUTY CYCLE
HCPL-J454/HCNW4504
R
L
– LOAD RESISTANCE – k
t
p
– PROPAGATION DELAY – µs
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
246810 12 14 16
18
0
HCPL-4504 fig 9
20
t
PHL
V
CC
= 5.0 V
T
A
= 25° C
C
L
= 15 pF
V = V = 1.5 V
I
F
= 10 mA
I
F
= 16 mA
t
PLH
10% DUTY CYCLE
THHL THLH
R
L
– LOAD RESISTANCE – k
t
p
– PROPAGATION DELAY – µs
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
246810 12 14 16 180
HCPL-4504 fig 10
20
1.6
1.8
2.0
2.2
2.4
2.6
V
CC
= 5.0 V
T
A
= 25° C
C
L
= 100 pF
V
THHL
= 1.5 V
V
THLH
= 2.0 V
I
F
= 10 mA
I
F
= 16 mA
t
PLH
t
PHL
50% DUTY CYCLE
T
A
– TEMPERATURE – °C
t
p
– PROPAGATION DELAY – µs
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
-40 -20 02040
60 80 100 120
-60
HCPL-4504 fig 11a
V
CC
= 15.0 V
R
L
= 20 k
C
L
= 100 pF
V
THHL
= 1.5 V
V
THLH
= 2.0 V
t
PLH
t
PHL
I
F
= 10 mA
I
F
= 16 mA
50% DUTY CYCLE
HCPL-4504/0454
T
A
– TEMPERATURE – °C
t
p
– PROPAGATION DELAY – µs
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
-40 -20 02040
60 80 100 120
-60
HCPL-4504 fig 11b
V
CC
= 15.0 V
R
L
= 20 k
C
L
= 100 pF
V
THHL
= 1.5 V
V
THLH
= 2.0 V
t
PLH
t
PHL
I
F
= 10 mA
I
F
= 16 mA
50% DUTY CYCLE
HCPL-J454/HCNW4504
Figure 14. Propagation delay time vs. supply
voltage.
Figure 13. Propagation delay time vs. load
capacitance.
Figure 12. Propagation delay time vs. load
resistance.
R
L
– LOAD RESISTANCE – k
t
p
– PROPAGATION DELAY – µs
1.6
1.4
1.2
1.0
0.6
0.2
0.0
510152025303540450
HCPL-4504 fig 12
V
CC
= 15.0 V
T
A
= 25° C
C
L
= 100 pF
V
THHL
= 1.5 V
V
THLH
= 2.0 V
50
t
PLH
t
PHL
1.8
0.4
0.8
I
F
= 10 mA
I
F
= 16 mA
50% DUTY CYCLE
C
L
– LOAD CAPACITANCE – pF
tp – PROPAGATION DELAY – µs
2.0
1.5
0.5
0.0
100 200 300 400 500 600 700 800 9000
HCPL-4504 fig 13
V
CC
= 15.0 V
T
A
= 25° C
R
L
= 20 k
V
THHL
= 1.5 V
V
THLH
= 2.0 V
1000
t
PLH
t
PHL
2.5
3.0
3.5
1.0
I
F
= 10 mA
I
F
= 16 mA
50% DUTY CYCLE
V
CC
– SUPPLY VOLTAGE – V
tp – PROPAGATION DELAY – µs
0.9
0.8
0.6
0.2
11 12 13 14 15 16 17 18 1910
HCPL-4504 fig 14
20
1.0
1.1
1.2
0.7
T
A
= 25° C
R
L
= 20 k
C
L
= 100 pF
V
V
0.5
0.4
0.3
t
PLH
t
PHL
I
F
= 10 mA
I
F
= 16 mA
50% DUTY CYCLE
THHL
= 1.5 V
= 2.0 V
THLH
17
Figure 15. Thermal derating curve, dependence of safety limiting valve with case temperature per
IEC/EN/DIN EN 60747-5-2.
HCPL-4504 fig 15a
OUTPUT POWER – P
S
, INPUT CURRENT – I
S
0
0
T
S
– CASE TEMPERATURE – °C
20050
400
12525 75 100 150
600
800
200
100
300
500
700
HCPL-4504 OPTION 060/HCPL-J454
175
(230)
P
S
(mW)
I
S
(mA) for HCPL-4504
OPTION 060
I
S
(mA) for HCPL-J454
OUTPUT POWER – P
S
, INPUT CURRENT – I
S
0
0
T
S
– CASE TEMPERATURE – °C
175
HCPL-4504 fig 15b
1000
50
400
12525 75 100 150
600
800
200
100
300
500
700
900
HCPL-0454 OPTION 060/HCNW4504
P
S
(mW) for HCNW4504
I
S
(mA) for HCNW4504
P
S
(mW) for HCPL-0454
OPTION 060
I
S
(mA) for HCPL-0454
OPTION 060
(150)
Figure 16. Typical power inverter.
BASE/GATE
DRIVE CIRCUIT
HCPL-4504/0454/J454
HCNW4504
2
3
8
7
6
5
+HV
Q1
LED 1
OUT 1
BASE/GATE
DRIVE CIRCUIT
2
3
8
7
6
5
–HV
Q2
LED 2
OUT 2
HCPL-4504 fig 16
+
+
HCPL-4504/0454/J454
HCNW4504
18
Power Inverter Dead Time and Propagation Delay Specica-
tions
The HCPL-4504/0454/J454 and HCNW4504 include a
specica tion intended to help designers minimize dead
time” in their power inverter designs. The new “propaga-
tion delay dierence specication (t
PLH
- t
PHL
) is useful for
deter min ing not only how much optocoupler switch-
ing delay is needed to prevent “shoot-through current,
but also for determin ing the best achievable worst-case
dead time for a given design.
When inverter power transis tors switch (Q1 and Q2 in
Figure 17), it is essential that they never conduct at the
same time. Extremely large currents will ow if there is
any overlap in their conduction during switching tran-
sitions, poten tially damaging the transistors and even
the sur rounding circuitry. This “shoot-through current is
eliminated by delay ing the turn-on of one transistor (Q2)
long enough to ensure that the opposing transistor (Q1)
has completely turned o. This delay intro duces a small
amount of dead time” at the output of the inverter dur-
ing which both transistors are o during switching tran-
sitions. Minimiz ing this dead time is an important design
goal for an inverter designer.
The amount of turn-on delay needed depends on the
propa ga tion delay characteristics of the optocoupler, as
well as the characteristics of the transistor base/gate drive
circuit. Consid er ing only the delay characteris tics of the
optocoupler (the charac teristics of the base/gate drive
circuit can be analyzed in the same way), it is important
to know the minimum and maximum turn-on (t
PHL
) and
turno (t
PLH
) propagation delay specica tions, prefer-
ably over the desired operating temperature range. The
importance of these specications is illustrated in Figure
17. The waveforms labeled “LED1”, “LED2”, “OUT1”, and
“OUT2” are the input and output voltages of the opto-
coupler circuits driving Q1 and Q2 respectively. Most in-
verters are designed such that the power transistor turns
on when the optocoupler LED turns on; this ensures that
both power transistors will be o in the event of a power
loss in the control circuit. Inverters can also be designed
such that the power transistor turns o when the opto-
coupler LED turns on; this type of design, however, re-
quires additional fail-safe circuitry to turn o the power
transistor if an over-current condition is detected. The
timing illustrated in Figure 17 assumes that the power
transistor turns on when the optocoupler LED turns on.
Figure 17. LED delay and dead time diagram.

HCPL-4504#060

Mfr. #:
Manufacturer:
Broadcom / Avago
Description:
High Speed Optocouplers 1MBd 1Ch 12mA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union