LTC4007
7
4007fc
PIN FUNCTIONS
ITH (Pin 10): Control Signal of the Inner Loop of the
Current Mode PWM. Higher ITH voltage corresponds to
higher charging current in normal operation. A 6k resistor,
in series with a capacitor of at least 0.1μF to GND provides
loop compensation. Typical full-scale output current is
40μA. Nominal voltage range for this pin is 0V to 3V.
PROG (Pin 11): Current Programming/Monitoring Input/
Output. An external resistor to GND programs the peak
charging current in conjunction with the current sensing
resistor. The voltage at this pin provides a linear indication of
charging current. Peak current is equivalent to 1.19V. Zero
current is approximately 0.3V. A capacitor from PROG to
ground is required to fi lter higher frequency components.
The maximum resistance to ground is 100k. Values higher
than 100k can cause the charger to shut down.
NC (Pin 12): No Connect.
I
CL
(Pin 13): Input Current Limit Indicator. Active low
digital output. Internal 10μA pull-up to 3.5V. Pulled low if
the charger current is being reduced by the input current
limiting function. The pin is capable of sinking at least
100μA. If V
LOGIC
is greater than 3.3V, add an external
pull-up.
CSP (Pin 14): Current Amplifi er CA1 Input. The CSP and
BAT pins measure the voltage across the sense resistor,
R
SENSE
, to provide the instantaneous current signals
required for both peak and average current mode
operation.
BAT (Pin 15): Battery Sense Input and the Negative
Reference for the Current Sense Resistor. A precision
internal resistor divider sets the fi nal oat potential on
this pin. The resistor divider is disconnected during
shutdown.
CHEM (Pin 16): Select 4.1V or 4.2V cell chemistry by
connecting the pin to GND or open, respectively. Internal
14μA pull-up to 5.3V. Can also be driven with open-
collector/drain logic levels.
FLAG (Pin 17): Active low open-drain output that indicates
when charging current has declined to 10% of maximum
programmed current. A pull-up resistor is required if this
function is used. The pin is capable of sinking at least
100μA.
CLP (Pin 18): Positive input to the supply current limiting
amplifi er, CL1. The threshold is set at 100mV above the
voltage at the CLN pin. When used to limit supply current, a
lter is needed to fi lter out the switching noise. If no current
limit function is desired, connect this pin to CLN.
CLN (Pin 19): Negative Reference for the Input Current
Limit Amplifi er, CL1. This pin also serves as the power
supply for the IC. A 10μF to 22μF bypass capacitor should
be connected as close as possible to this pin.
TGATE (Pin 20): Drives the top external P-channel MOSFET
of the battery charger buck converter.
PGND (Pin 21): High Current Ground Return for the
BGATE Driver.
BGATE (Pin 22): Drives the bottom external N-channel
MOSFET of the battery charger buck converter.
INFET (Pin 23): Drives the Gate of the External Input PFET.
SHDN (Pin 24):
Charger is shut down and timer is reset when this pin is
HIGH. Internal 10μA pull-up to 3.5V. This pin can also be
used to reset the charger by applying a positive pulse that
is a minimum of 0.1μs long.
LTC4007
8
4007fc
BLOCK DIAGRAM
+
+
7
6
16
9k
1.19V
11.67μA
TBAD
RESTART
MUX
1.105V
EA
g
m
= 1m
g
m
= 1m
g
m
= 1.4m
708mV
1.19V
3C4C
FLAG
GND
CHEM
8
LOBAT
13
20
I
CL
TGATE
BGATE
Q1
Q2
18
CLP
100mV
15nF
20μF
R
CL
5k
19
CLN
22
PGND
L1
397mV
CHG
R
T
NTC
0.47μF
10k
NTC
R
RT
+
+
CL1
TIMER/CONTROLLER
THERMISTOR
OSCILLATOR
2
4
9
BAT
3k
R
SENSE
CSP
ITH
10
32.4k
WATCHDOG
DETECT t
OFF
CLN
DCIN
OV
OSCILLATOR
1.28V
PWM
LOGIC
S
R
Q
CHARGE
I
REV
+
I
CMP
+
÷5
BUFFERED ITH
21
PROG
4007 BD
R
PROG
26.7k
0.0047μF
11
17
FAULT
5
SHDN
24
ACP
3
INFET
Q3
DCIN
0.1μF
V
IN
23
1
+
CLN
5.8V
3k
20μF
6K
0.12μF
15
14
+
CA1
CA2
+
+
C/10
35mV
+
+
17mV
Ω
Ω
Ω
LTC4007
9
4007fc
TEST CIRCUIT
+
+
EA
LT1055
LTC4007
V
REF
CHEM
3C4C
BAT
DIVIDER/
MUX
16
7
15
CSP
14
ITH
0.6V
4007 TC
10
OPERATION
Overview
The LTC4007 is a synchronous current mode PWM step-
down (buck) switcher battery charger controller. The charge
current is programmed by the combination of a program
resistor (R
PROG
) from the PROG pin to ground and a sense
resistor (R
SENSE
) between the CSP and BAT pins. The fi nal
oat voltage is programmed to one of four values (12.3V,
12.6V, 16.4V, 16.8V) with ±1% maximum accuracy using
pins 3C4C and CHEM. Charging begins when the potential
at the DCIN pin rises above the voltage at BAT (and the
UVLO voltage) and the SHDN pin is low; the CHG pin is
set low. At the beginning of the charge cycle, if the cell
voltage is below 2.5V (2.44V if CHEM is low), the LOBAT
pin will be low. The LOBAT indicator can be used to reduce
the charging current to a low value, typically 10% of full
scale. If the cell voltage stays below 2.5V for 25% of the
total charge time, the charge sequence will be terminated
immediately and the FAULT pin will be set low.
An external thermistor network is sampled at regular inter-
vals. If the thermistor value exceeds design limits, charging
is suspended and the FAULT pin is set low. If the thermistor
value returns to an acceptable value, charging resumes
and the FAULT pin is set high. An external resistor on the
R
T
pin sets the charge termination time. Charge termination
can be defeated by forcing the CHG pin to a low voltage.
As the battery approaches the fi nal oat voltage, the charge
current will begin to decrease. When the current drops
to 10% of the full-scale charge current, an internal C/10
comparator will indicate this condition by latching the
FLAG pin low. The charge timer is also reset to 1/4 of the
total charge time when FLAG goes low. If this condition
is caused by an input current limit condition, described
below, then the FLAG indicator will be inhibited. When
a time-out occurs, charging is terminated immediately
and the CHG pin is forced to a high impedance state.
The charger will automatically restart if the cell voltage
is below 3.9V (or 3.81V if CHEM is low). To restart the
charge cycle manually, simply remove the input voltage
and reapply it, or set the SHDN pin high momentarily.
When the input voltage is not present, the charger goes
into a sleep mode, dropping battery current drain to 15μA.
This greatly reduces the current drain on the battery and
increases the standby time. The charger is inhibited any
time the SHDN pin is high.
Input FET
The input FET circuit performs two functions. It enables
the charger if the input voltage is higher than the CLN
pin and provides the logic indicator of AC present on the
ACP pin. It controls the gate of the input FET to keep a low
forward voltage drop when charging and also prevents
reverse current fl ow through the input FET.
If the input voltage is less than V
CLN
, it must go at least
170mV higher than V
CLN
to activate the charger. When
this occurs the ACP pin is released and pulled up with an
external load to indicate that the adapter is present. The
gate of the input FET is driven to a voltage suffi cient to

LTC4007EGN#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management 4A, Li-Ion Charger w/ Termination
Lifecycle:
New from this manufacturer.
Delivery:
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