REV. C
ADF4217L/ADF4218L/ADF4219L
–16–
Table VII. RF Reference Counter Latch Map
14-BIT REFERENCE COUNTER, R
CONTROL
BITS
DB0DB1DB2DB3DB4DB5DB6DB7DB8DB9DB10DB11DB12DB13DB14DB15DB16DB17DB18DB19DB20DB21
C1 (0)C2 (1)R1R2R3R4R5R6R7R8R9R10R11R12R13R14P13P10P11P12
RF REFERENCE COUNTER LATCH
RF F
O
RF LOCK
DETECT
THREE-STATE
CP
IF
RF CP
GAIN
RF PD
POLARITY
P9
0
1
NEGATIVE
POSITIVE
P9 PD POLARITY
0
1
1.0mA
4.0mA
P13
I
CP
0
1
NORMAL
THREE-STATE
P10
CHARGE PUMP
OUTPUT
R15
ADF4129L
ONLY
0
0
0
0
0
0
1
1
1
1
1
1
0
0
X
X
1
1
X
X
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
LOGIC LOW STATE
IF ANALOG LOCK DETECT
IF REFERENCE DIVIDER OUTPUT
IF N DIVIDER OUTPUT
RF ANALOG LOCK DETECT
RF/IF ANALOG LOCK DETECT
RF REFERENCE DIVIDER
RF N DIVIDER
FA ST LOCK OUTPUT SWITCH ON
AND CONNECTED TO MUXOUT
IF COUNTER RESET
RF COUNTER RESET
IF AND RF COUNTER RESET
P12 P11
P4 P3
MUXOUT
FROM RF R LATCH
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
0
1
1
0
.
.
.
0
0
1
1
.
1
1
2
3
4
.
.
.
16380
16381
16382
16383
.
32767
R14 R13 R12 .......... R3 R2 R1 DIVIDE RATIOR15
1
0
1
0
.
.
.
0
1
0
1
.
1
0
0
0
1
.
.
.
1
1
1
1
.
1
0
0
0
0
.
.
.
1
1
1
1
.
1
0
0
0
0
.
.
.
1
1
1
1
.
1
0
0
0
0
.
.
.
1
1
1
1
.
1
0
0
0
0
.
.
.
0
0
0
0
.
1
REV. C
ADF4217L/ADF4218L/ADF4219L
–17–
Table VIII. ADF4217L/ADF4218L RF AB Counter Latch Map
11-BIT B COUNTER
CONTROL
BITS
DB0DB1DB2DB3DB4DB5DB6DB7DB8DB9DB10DB11DB12DB13DB14DB15DB16DB17DB18DB19DB20DB21
C1 (1)C2 (1)A1A2A3A4A5A6B1B2B3B4B5B6B7B8B9B10B11P14P16
RF
POWER-DOWN
RF
PRESCALER
RF AB COUNTER LATCH
6-BIT A COUNTER
0
1
64/65
32/33
P14
RF PRESCALER
ADF4217L
32/33
64/65
RF PRESCALER
ADF4218L
A6
0
0
0
0
.
.
.
1
1
0
0
0
0
.
.
.
1
1
0
0
0
0
.
.
.
1
1
0
0
1
1
.
.
.
1
1
0
1
0
1
.
.
.
0
1
0
1
2
3
.
.
.
62
63
A5 A4 A3 A2 A1 A COUNTER DIVIDE RATIO
0
0
0
0
.
.
.
1
1
0
1
NORMAL OPERATION
POWER-DOWN
P16 RF SECTION
N = BP + A, P IS PRESCALER VALUE SET BY P6, B MUST BE
GREATER THAN OR EQUAL TO A. TO ENSURE CONTINUOUSLY
ADJACENT VALUES OF NF
REF
, N
MIN
IS (P
2
P).
0
0
0
0
.
.
.
1
1
1
1
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
NOT ALLOWED
NOT ALLOWED
3
4
.
.
.
2044
2045
2046
2047
B11 B10 B9 .......... B3 B2 B1 B COUNTER DIVIDE RATIO
0
0
0
0
.
.
.
1
1
1
1
0
0
0
0
.
.
.
1
1
1
1
0
0
0
1
.
.
.
1
1
1
1
0
1
1
0
.
.
.
0
0
1
1
1
0
1
0
.
.
.
0
1
0
1
NOT
USED
REV. C
ADF4217L/ADF4218L/ADF4219L
–18–
Table IX. ADF4219L RF AB Counter Latch Map
13-BIT B COUNTER
CONTROL
BITS
DB0DB1DB2DB3DB4DB5DB6DB7DB8DB9DB10DB11DB12DB13DB14DB15DB16DB17DB18DB19DB20DB21
C1 (1)C2 (1)A1A2A3A4A5B1B2B3B4B5B6B7B8B9B10B11B12B13P14P16
RF
POWER-DOWN
RF
PRESCALER
RF AB COUNTER LATCH
5-BIT A COUNTER
0
1
NORMAL OPERATION
POWER-DOWN
P16 IF SECTION
N = BP + A, P IS PRESCALER VALUE SET BY P14.
B MUST BE GREATER THAN OR EQUAL TO A.
FOR CONTIGUOUS VALUES OF N, N
MIN
IS (P
2
–P).
A MUST BE LESS THAN P.
0
1
16/17
32/33
P14 IF PRESCALER
0
0
0
0
.
1
1
0
0
0
0
.
1
1
0
0
0
0
.
1
1
0
0
1
1
.
1
1
0
1
0
1
.
0
1
0
1
2
3
.
30
31
A5 A4 A3 A2 A1 A COUNTER DIVIDE RATIO
0
0
0
0
.
.
.
1
1
1
1
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
NOT ALLOWED
NOT ALLOWED
3
4
.
.
.
8188
8189
8190
8191
B13 B12 B11 .......... B3 B2 B1
0
0
0
0
.
.
.
1
1
1
1
0
0
0
0
.
.
.
1
1
1
1
0
0
0
1
.
.
.
1
1
1
1
0
1
1
0
.
.
.
0
0
1
1
1
0
1
0
.
.
.
0
1
0
1
B COUNTER DIVIDE RATIO

ADF4218LBRUZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Phase Locked Loops - PLL Low Power Dual RF/IF Integer-N
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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