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ADF4218LBRUZ
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
REV. C
ADF4217L/ADF4218L/ADF4219L
–16–
Table VII.
RF Reference Counter Latch Map
14-BIT REFERENCE COUNTER,
R
CONTROL
BITS
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
DB18
DB19
DB20
DB21
C1 (0)
C2 (1)
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
P13
P10
P11
P12
RF REFERENCE COUNTER LA
TCH
RF F
O
RF LOCK
DETECT
THREE-ST
A
TE
CP
IF
RF CP
GAIN
RF PD
POLARITY
P9
0
1
NEGA
TIVE
POSITIVE
P9
PD POLARITY
0
1
1.0mA
4.0mA
P13
I
CP
0
1
NORMAL
THREE-ST
A
TE
P10
CHARGE PUMP
OUTPUT
R15
ADF4129L
ONL
Y
0
0
0
0
0
0
1
1
1
1
1
1
0
0
X
X
1
1
X
X
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
LOGIC LO
W ST
A
TE
IF ANALOG LOCK DETECT
IF REFERENCE DIVIDER OUTPUT
IF N DIVIDER OUTPUT
RF ANALOG LOCK DETECT
RF/IF ANALOG LOCK DETECT
RF REFERENCE DIVIDER
RF N DIVIDER
FA
ST LOCK OUTPUT SWITCH ON
AND CONNECTED
T
O MUXOUT
IF COUNTER RESET
RF COUNTER RESET
IF AND RF COUNTER RESET
P12
P11
P4
P3
MUXOUT
FROM RF R LA
TCH
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
0
1
1
0
.
.
.
0
0
1
1
.
1
1
2
3
4
.
.
.
16380
16381
16382
16383
.
32767
R14
R13
R12
..........
R3
R2
R1
DIVIDE RA
TIO
R15
1
0
1
0
.
.
.
0
1
0
1
.
1
0
0
0
1
.
.
.
1
1
1
1
.
1
0
0
0
0
.
.
.
1
1
1
1
.
1
0
0
0
0
.
.
.
1
1
1
1
.
1
0
0
0
0
.
.
.
1
1
1
1
.
1
0
0
0
0
.
.
.
0
0
0
0
.
1
REV. C
ADF4217L/ADF4218L/ADF4219L
–17–
Table VIII.
ADF4217L/ADF4218L RF AB Counter Latch Map
11-BIT B COUNTER
CONTROL
BITS
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
DB18
DB19
DB20
DB21
C1 (1)
C2 (1)
A1
A2
A3
A4
A5
A6
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
P14
P16
RF
PO
WER-DO
WN
RF
PRESCALER
RF AB COUNTER LA
TCH
6-BIT A COUNTER
0
1
64/65
32/33
P14
RF PRESCALER
ADF4217L
32/33
64/65
RF PRESCALER
ADF4218L
A6
0
0
0
0
.
.
.
1
1
0
0
0
0
.
.
.
1
1
0
0
0
0
.
.
.
1
1
0
0
1
1
.
.
.
1
1
0
1
0
1
.
.
.
0
1
0
1
2
3
.
.
.
62
63
A5
A4
A3
A2
A1
A COUNTER DIVIDE RA
TIO
0
0
0
0
.
.
.
1
1
0
1
NORMAL OPERA
TION
PO
WER-DO
WN
P16
RF SECTION
N = BP + A,
P IS PRESCALER
V
ALUE SET BY P6, B MUST BE
GREA
TER
THAN OR EQU
AL
T
O A.
TO ENSURE CONTINUOUSL
Y
ADJA
CENT
V
ALUES OF N
ⴛ
F
RE
F
, N
MIN
IS (P
2
–
P).
0
0
0
0
.
.
.
1
1
1
1
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
NO
T ALLO
WED
NO
T ALLO
WED
3
4
.
.
.
2044
2045
2046
2047
B11
B10
B9
..........
B3
B2
B1
B COUNTER DIVIDE RA
TIO
0
0
0
0
.
.
.
1
1
1
1
0
0
0
0
.
.
.
1
1
1
1
0
0
0
1
.
.
.
1
1
1
1
0
1
1
0
.
.
.
0
0
1
1
1
0
1
0
.
.
.
0
1
0
1
NO
T
USED
REV. C
ADF4217L/ADF4218L/ADF4219L
–18–
Table IX.
ADF4219L RF AB Counter Latch Map
13-BIT B COUNTER
CONTROL
BITS
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
DB18
DB19
DB20
DB21
C1 (1)
C2 (1)
A1
A2
A3
A4
A5
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
P14
P16
RF
PO
WER-DO
WN
RF
PRESCALER
RF AB COUNTER LA
TCH
5-BIT A COUNTER
0
1
NORMAL OPERA
TION
PO
WER-DO
WN
P16
IF SECTION
N = BP + A,
P IS PRESCALER
V
ALUE SET BY P14.
B MUST BE GREA
TER
THAN OR EQU
AL
T
O A.
FOR CONTIGUOUS
V
ALUES OF N,
N
MIN
IS (P
2
–P).
A MUST BE LESS
THAN P
.
0
1
16/17
32/33
P14
IF PRESCALER
0
0
0
0
.
1
1
0
0
0
0
.
1
1
0
0
0
0
.
1
1
0
0
1
1
.
1
1
0
1
0
1
.
0
1
0
1
2
3
.
30
31
A5
A4
A3
A2
A1
A COUNTER DIVIDE RA
TIO
0
0
0
0
.
.
.
1
1
1
1
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
NO
T ALLO
WED
NO
T ALLO
WED
3
4
.
.
.
8188
8189
8190
8191
B13
B12
B11
..........
B3
B2
B1
0
0
0
0
.
.
.
1
1
1
1
0
0
0
0
.
.
.
1
1
1
1
0
0
0
1
.
.
.
1
1
1
1
0
1
1
0
.
.
.
0
0
1
1
1
0
1
0
.
.
.
0
1
0
1
B COUNTER DIVIDE RA
TIO
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
ADF4218LBRUZ
Mfr. #:
Buy ADF4218LBRUZ
Manufacturer:
Analog Devices Inc.
Description:
Phase Locked Loops - PLL Low Power Dual RF/IF Integer-N
Lifecycle:
New from this manufacturer.
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